CN1208726C - 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 - Google Patents

当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 Download PDF

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Publication number
CN1208726C
CN1208726C CNB008180385A CN00818038A CN1208726C CN 1208726 C CN1208726 C CN 1208726C CN B008180385 A CNB008180385 A CN B008180385A CN 00818038 A CN00818038 A CN 00818038A CN 1208726 C CN1208726 C CN 1208726C
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cache
address
way
tag
partial
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Chinese (zh)
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CN1415092A (zh
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J·B·凯勒
K·R·舍克尔
P·夏尔马
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GlobalFoundries Inc
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Advanced Micro Devices Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/30149Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824Operand accessing
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824Operand accessing
    • G06F9/383Operand prefetching
    • G06F9/3832Value prediction for operands; operand history buffers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838Dependency mechanisms, e.g. register scoreboarding
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838Dependency mechanisms, e.g. register scoreboarding
    • G06F9/384Register renaming
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854Instruction completion, e.g. retiring, committing or graduating
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858Result writeback, i.e. updating the architectural state or memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/608Details relating to cache mapping
    • G06F2212/6082Way prediction in set-associative cache
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CNB008180385A 2000-01-03 2000-08-08 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存 Expired - Lifetime CN1208726C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/476,577 US6687789B1 (en) 2000-01-03 2000-01-03 Cache which provides partial tags from non-predicted ways to direct search if way prediction misses
US09/476,577 2000-01-03

Publications (2)

Publication Number Publication Date
CN1415092A CN1415092A (zh) 2003-04-30
CN1208726C true CN1208726C (zh) 2005-06-29

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CNB008180385A Expired - Lifetime CN1208726C (zh) 2000-01-03 2000-08-08 当预测路线失败时从非预测路线提供部分标记以指导搜索的高速缓存

Country Status (7)

Country Link
US (1) US6687789B1 (enExample)
EP (1) EP1244970B1 (enExample)
JP (1) JP2003519835A (enExample)
KR (1) KR100747127B1 (enExample)
CN (1) CN1208726C (enExample)
DE (1) DE60003235T2 (enExample)
WO (1) WO2001050272A1 (enExample)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4027620B2 (ja) * 2001-06-20 2007-12-26 富士通株式会社 分岐予測装置、プロセッサ、及び分岐予測方法
US6944713B2 (en) * 2002-06-18 2005-09-13 Intel Corporation Low power set associative cache
US20040054867A1 (en) * 2002-09-13 2004-03-18 Paulus Stravers Translation lookaside buffer
US6973557B2 (en) * 2003-02-04 2005-12-06 Sun Microsystems, Inc. Apparatus and method for dual access to a banked and pipelined data cache memory unit
US20040181626A1 (en) * 2003-03-13 2004-09-16 Pickett James K. Partial linearly tagged cache memory system
TWI246658B (en) * 2003-04-25 2006-01-01 Ip First Llc Microprocessor, apparatus and method for selectively associating store buffer cache line status with response buffer cache line status
US20040243767A1 (en) * 2003-06-02 2004-12-02 Cierniak Michal J. Method and apparatus for prefetching based upon type identifier tags
US7117290B2 (en) * 2003-09-03 2006-10-03 Advanced Micro Devices, Inc. MicroTLB and micro tag for reducing power in a processor
US20050050278A1 (en) * 2003-09-03 2005-03-03 Advanced Micro Devices, Inc. Low power way-predicted cache
US7085894B2 (en) * 2003-09-11 2006-08-01 International Business Machines Corporation Selectively accepting cache content
US6961276B2 (en) * 2003-09-17 2005-11-01 International Business Machines Corporation Random access memory having an adaptable latency
US7669009B2 (en) * 2004-09-23 2010-02-23 Intel Corporation Method and apparatus for run-ahead victim selection to reduce undesirable replacement behavior in inclusive caches
KR100688503B1 (ko) * 2004-11-02 2007-03-02 삼성전자주식회사 브랜치 목적 어드레스를 이용하여 캐쉬 웨이를 예측하는프로세서 및 그 방법
US7707387B2 (en) 2005-06-01 2010-04-27 Microsoft Corporation Conditional execution via content addressable memory and parallel computing execution model
US7793040B2 (en) * 2005-06-01 2010-09-07 Microsoft Corporation Content addressable memory architecture
US20060277352A1 (en) * 2005-06-07 2006-12-07 Fong Pong Method and system for supporting large caches with split and canonicalization tags
US20060274787A1 (en) * 2005-06-07 2006-12-07 Fong Pong Adaptive cache design for MPT/MTT tables and TCP context
US9946547B2 (en) 2006-09-29 2018-04-17 Arm Finance Overseas Limited Load/store unit for a processor, and applications thereof
US7594079B2 (en) * 2006-09-29 2009-09-22 Mips Technologies, Inc. Data cache virtual hint way prediction, and applications thereof
JP5326314B2 (ja) 2008-03-21 2013-10-30 富士通株式会社 プロセサおよび情報処理装置
US20100332762A1 (en) * 2009-06-30 2010-12-30 Moga Adrian C Directory cache allocation based on snoop response information
US8904111B2 (en) 2009-10-20 2014-12-02 The University Of Electro-Communications Cache memory with CAM and SRAM sub-tags and generation control
US8392665B2 (en) 2010-09-25 2013-03-05 Intel Corporation Allocation and write policy for a glueless area-efficient directory cache for hotly contested cache lines
CN102193875B (zh) * 2011-04-26 2013-08-14 北京工业大学 多核下基于Cache划分的自适应路预测算法
US20120297256A1 (en) * 2011-05-20 2012-11-22 Qualcomm Incorporated Large Ram Cache
US8458447B2 (en) * 2011-06-17 2013-06-04 Freescale Semiconductor, Inc. Branch target buffer addressing in a data processor
US9460016B2 (en) 2014-06-16 2016-10-04 Analog Devices Global Hamilton Cache way prediction
KR102354990B1 (ko) * 2014-09-17 2022-01-24 삼성전자주식회사 캐시 메모리 시스템 및 그 동작방법
US9846648B2 (en) 2015-05-11 2017-12-19 Intel Corporation Create page locality in cache controller cache allocation
GB2553102B (en) * 2016-08-19 2020-05-20 Advanced Risc Mach Ltd A memory unit and method of operation of a memory unit to handle operation requests
US10324850B2 (en) 2016-11-11 2019-06-18 Microsoft Technology Licensing, Llc Serial lookup of tag ways
GB2560336B (en) * 2017-03-07 2020-05-06 Imagination Tech Ltd Address generators for verifying integrated circuit hardware designs for cache memory
US10565122B2 (en) 2017-05-30 2020-02-18 Microsoft Technology Licensing, Llc Serial tag lookup with way-prediction
US10545875B2 (en) 2017-12-27 2020-01-28 Advanced Micro Devices, Inc. Tag accelerator for low latency DRAM cache
US11507174B2 (en) 2020-02-25 2022-11-22 Qualcomm Incorporated System physical address size aware cache memory
CN111988444B (zh) * 2020-08-19 2022-10-18 成都安可信电子股份有限公司 一种同步总线快速搜索终端地址搜索方法
US11928472B2 (en) 2020-09-26 2024-03-12 Intel Corporation Branch prefetch mechanisms for mitigating frontend branch resteers
CN114691542A (zh) * 2020-12-25 2022-07-01 瑞昱半导体股份有限公司 数据处理装置与其数据存取电路
US12182317B2 (en) 2021-02-13 2024-12-31 Intel Corporation Region-based deterministic memory safety
US11593001B1 (en) * 2021-08-02 2023-02-28 Nvidia Corporation Using per memory bank load caches for reducing power use in a system on a chip
US12235791B2 (en) 2021-08-23 2025-02-25 Intel Corporation Loop driven region based frontend translation control for performant and secure data-space guided micro-sequencing

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62293596A (ja) * 1986-06-12 1987-12-21 Matsushita Electric Ind Co Ltd 連想記憶装置
US4914582A (en) 1986-06-27 1990-04-03 Hewlett-Packard Company Cache tag lookaside
JPS63163939A (ja) * 1986-12-26 1988-07-07 Nippon Telegr & Teleph Corp <Ntt> キヤツシユメモリの制御方法
JPH02156352A (ja) * 1988-12-09 1990-06-15 Hitachi Ltd キャッシュメモリ
US5235697A (en) 1990-06-29 1993-08-10 Digital Equipment Set prediction cache memory system using bits of the main memory address
JPH05120135A (ja) * 1991-10-25 1993-05-18 Oki Electric Ind Co Ltd キヤツシユ制御方式
US5418922A (en) 1992-04-30 1995-05-23 International Business Machines Corporation History table for set prediction for accessing a set associative cache
JPH0721785A (ja) * 1993-06-29 1995-01-24 Kawasaki Steel Corp 半導体メモリ
US5671444A (en) 1994-02-28 1997-09-23 Intel Corporaiton Methods and apparatus for caching data in a non-blocking manner using a plurality of fill buffers
EP0675443A1 (en) 1994-03-30 1995-10-04 Digital Equipment Corporation Apparatus and method for accessing direct mapped cache
JP3589485B2 (ja) * 1994-06-07 2004-11-17 株式会社ルネサステクノロジ セットアソシアティブ方式のメモリ装置およびプロセッサ
US5732242A (en) * 1995-03-24 1998-03-24 Silicon Graphics, Inc. Consistently specifying way destinations through prefetching hints
JPH08263370A (ja) * 1995-03-27 1996-10-11 Toshiba Microelectron Corp キャッシュメモリシステム
US5845323A (en) * 1995-08-31 1998-12-01 Advanced Micro Devices, Inc. Way prediction structure for predicting the way of a cache in which an access hits, thereby speeding cache access time
US5893146A (en) 1995-08-31 1999-04-06 Advanced Micro Design, Inc. Cache structure having a reduced tag comparison to enable data transfer from said cache
US5752069A (en) 1995-08-31 1998-05-12 Advanced Micro Devices, Inc. Superscalar microprocessor employing away prediction structure
US5802594A (en) 1995-09-06 1998-09-01 Intel Corporation Single phase pseudo-static instruction translation look-aside buffer
AU7720096A (en) 1996-11-04 1998-05-29 Advanced Micro Devices Inc. A way prediction structure
US5848428A (en) 1996-12-19 1998-12-08 Compaq Computer Corporation Sense amplifier decoding in a memory device to reduce power consumption
JPH1139216A (ja) * 1997-07-24 1999-02-12 Hitachi Ltd 半導体記憶装置及びキャッシュメモリシステム
US5956746A (en) * 1997-08-13 1999-09-21 Intel Corporation Computer system having tag information in a processor and cache memory
US6016545A (en) 1997-12-16 2000-01-18 Advanced Micro Devices, Inc. Reduced size storage apparatus for storing cache-line-related data in a high frequency microprocessor

Also Published As

Publication number Publication date
KR100747127B1 (ko) 2007-08-09
JP2003519835A (ja) 2003-06-24
EP1244970B1 (en) 2003-06-04
CN1415092A (zh) 2003-04-30
EP1244970A1 (en) 2002-10-02
US6687789B1 (en) 2004-02-03
DE60003235T2 (de) 2004-04-08
WO2001050272A1 (en) 2001-07-12
DE60003235D1 (de) 2003-07-10
KR20020067596A (ko) 2002-08-22

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Granted publication date: 20050629