DE59607510D1 - Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes - Google Patents

Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes

Info

Publication number
DE59607510D1
DE59607510D1 DE59607510T DE59607510T DE59607510D1 DE 59607510 D1 DE59607510 D1 DE 59607510D1 DE 59607510 T DE59607510 T DE 59607510T DE 59607510 T DE59607510 T DE 59607510T DE 59607510 D1 DE59607510 D1 DE 59607510D1
Authority
DE
Germany
Prior art keywords
generating
storage cell
flash eeprom
memory cell
cell field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE59607510T
Other languages
English (en)
Inventor
Martin Kerber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE59607510D1 publication Critical patent/DE59607510D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
DE59607510T 1995-09-19 1996-09-10 Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes Expired - Fee Related DE59607510D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19534778A DE19534778C1 (de) 1995-09-19 1995-09-19 Verfahren zum Erzeugen der Sourcebereiche eines Flash-EEPROM-Speicherzellenfeldes
PCT/DE1996/001696 WO1997011489A1 (de) 1995-09-19 1996-09-10 Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes

Publications (1)

Publication Number Publication Date
DE59607510D1 true DE59607510D1 (de) 2001-09-20

Family

ID=7772593

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19534778A Expired - Fee Related DE19534778C1 (de) 1995-09-19 1995-09-19 Verfahren zum Erzeugen der Sourcebereiche eines Flash-EEPROM-Speicherzellenfeldes
DE59607510T Expired - Fee Related DE59607510D1 (de) 1995-09-19 1996-09-10 Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19534778A Expired - Fee Related DE19534778C1 (de) 1995-09-19 1995-09-19 Verfahren zum Erzeugen der Sourcebereiche eines Flash-EEPROM-Speicherzellenfeldes

Country Status (10)

Country Link
US (1) US6090665A (de)
EP (1) EP0852066B1 (de)
JP (1) JPH11512567A (de)
KR (1) KR19990045751A (de)
CN (1) CN1196831A (de)
AT (1) ATE204404T1 (de)
DE (2) DE19534778C1 (de)
ES (1) ES2163045T3 (de)
RU (1) RU2168241C2 (de)
WO (1) WO1997011489A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320784B1 (en) * 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US7026697B2 (en) * 2000-03-31 2006-04-11 Shipley Company, L.L.C. Microstructures comprising a dielectric layer and a thin conductive layer
US6698295B1 (en) * 2000-03-31 2004-03-02 Shipley Company, L.L.C. Microstructures comprising silicon nitride layer and thin conductive polysilicon layer
US6624027B1 (en) * 2002-05-09 2003-09-23 Atmel Corporation Ultra small thin windows in floating gate transistors defined by lost nitride spacers
CN106298790B (zh) * 2016-09-18 2018-11-27 上海华虹宏力半导体制造有限公司 快闪存储器的形成方法
CN110838491B (zh) * 2018-08-15 2022-05-10 无锡华润上华科技有限公司 半导体结构及其制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4417264A (en) * 1982-03-09 1983-11-22 Rca Corporation Electrically alterable, nonvolatile floating gate memory device
SE8301227L (sv) * 1982-03-09 1983-09-10 Rca Corp Halvledarminne med frisvevande styre
US4513397A (en) * 1982-12-10 1985-04-23 Rca Corporation Electrically alterable, nonvolatile floating gate memory device
DE3816358A1 (de) * 1988-05-13 1989-11-23 Eurosil Electronic Gmbh Nichtfluechtige speicherzelle und verfahren zur herstellung
JP3065164B2 (ja) * 1992-03-18 2000-07-12 富士通株式会社 半導体装置及びその製造方法
US5297082A (en) * 1992-11-12 1994-03-22 Micron Semiconductor, Inc. Shallow trench source eprom cell
US5858821A (en) * 1993-05-12 1999-01-12 Micron Technology, Inc. Method of making thin film transistors
US5598367A (en) * 1995-06-07 1997-01-28 International Business Machines Corporation Trench EPROM
US5861333A (en) * 1996-10-25 1999-01-19 United Microelectonics Corp. Method of tunnel window process for EEPROM cell technology
US5930627A (en) * 1997-05-05 1999-07-27 Chartered Semiconductor Manufacturing Company, Ltd. Process improvements in self-aligned polysilicon MOSFET technology using silicon oxynitride
US5888870A (en) * 1997-10-22 1999-03-30 Advanced Micro Devices, Inc. Memory cell fabrication employing an interpoly gate dielectric arranged upon a polished floating gate

Also Published As

Publication number Publication date
ATE204404T1 (de) 2001-09-15
RU2168241C2 (ru) 2001-05-27
EP0852066B1 (de) 2001-08-16
ES2163045T3 (es) 2002-01-16
CN1196831A (zh) 1998-10-21
US6090665A (en) 2000-07-18
WO1997011489A1 (de) 1997-03-27
EP0852066A1 (de) 1998-07-08
DE19534778C1 (de) 1997-04-03
JPH11512567A (ja) 1999-10-26
KR19990045751A (ko) 1999-06-25

Similar Documents

Publication Publication Date Title
CN1750170B (zh) 集成存储装置及方法
DE59607562D1 (de) Verfahren zur Herstellung einer DRAM-Speicherzelle mit vertikalem Transistor
TW262594B (en) A self-aligned buried channel/junction stacked gate flash memory cell
TW375795B (en) Self-aligned diffused source vertical transistors with deep trench capacitors in a 4F-square memory cell array
KR940001425A (ko) 신규한 플로그래밍 수단을 갖는 고밀도 "전기적으로 소거 가능하고 프로그램 가능한 판독 전용 메모리(eeprom)"셀 어레이 및 이를 제조하는 방법
EP0717413A3 (de) Speicherzelle und Wortleitungstreiber für ASIC-hergestellten integrierten DRAM-Speicher
EP0331911A3 (de) Ladungsverstärkende Grabenspeicherzelle
US11800711B2 (en) Integrated assemblies, and methods of forming integrated assemblies
DE59607510D1 (de) Verfahren zum erzeugen der sourcebereiche eines flash-eeprom-speicherzellenfeldes
CN100468780C (zh) 一种nrom闪存单元的制备方法
TW428319B (en) High-density contactless flash memory on silicon above an insulator and its manufacturing method
TW359866B (en) An isolation collar nitride liner for DRAM process improvement
DE3481667D1 (de) Mos-speicherzelle mit schwimmendem gate und verfahren zu ihrer verfertigung.
WO2004025731A3 (de) Verfahren zur herstellung von sonos-speicherzellen, sonos-speicherzelle und speicherzellenfeld
TW348301B (en) Method for the production of a DRAM cell arrangement
TW200518275A (en) Single transistor ram cell and method of manufacture
KR970054236A (ko) 플래쉬 메모리 소자 및 그 제조방법
CN102376652A (zh) 减小写入干扰的分离栅闪存制作方法
TW357454B (en) Semiconductor memory device
TW349265B (en) Method to produce a memory-cell arrangement
NO990075D0 (no) Lagercelle med flytende port og redusert ladningslekkasje
JPS6480069A (en) Semiconductor storage device and manufacture thereof
TW429555B (en) Method for making poly-spacer word line in the high density memory cell
GB1516058A (en) Semiconductor storage cells
TW373321B (en) Memory arrangement and the production method therefor

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee