DE4300983A1 - - Google Patents

Info

Publication number
DE4300983A1
DE4300983A1 DE4300983A DE4300983A DE4300983A1 DE 4300983 A1 DE4300983 A1 DE 4300983A1 DE 4300983 A DE4300983 A DE 4300983A DE 4300983 A DE4300983 A DE 4300983A DE 4300983 A1 DE4300983 A1 DE 4300983A1
Authority
DE
Germany
Prior art keywords
semiconductor device
photosensitive resin
negative
negative photosensitive
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE4300983A
Other languages
German (de)
English (en)
Other versions
DE4300983C2 (de
Inventor
David A Cathey
J Brett Rolfson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE4300983A1 publication Critical patent/DE4300983A1/de
Application granted granted Critical
Publication of DE4300983C2 publication Critical patent/DE4300983C2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/69—Etching of wafers, substrates or parts of devices using masks for semiconductor materials
    • H10P50/691—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials
    • H10P50/692—Etching of wafers, substrates or parts of devices using masks for semiconductor materials for Group V materials or Group III-V materials characterised by their composition, e.g. multilayer masks or materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041—Photolithographic processes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist

Landscapes

  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Drying Of Semiconductors (AREA)
DE4300983A 1992-01-23 1993-01-15 Ätzverfahren für die Herstellung einer Halbleitervorrichtung Expired - Lifetime DE4300983C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/824,792 US5223083A (en) 1992-01-23 1992-01-23 Process for etching a semiconductor device using an improved protective etching mask

Publications (2)

Publication Number Publication Date
DE4300983A1 true DE4300983A1 (enExample) 1993-07-29
DE4300983C2 DE4300983C2 (de) 1998-11-05

Family

ID=25242330

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4300983A Expired - Lifetime DE4300983C2 (de) 1992-01-23 1993-01-15 Ätzverfahren für die Herstellung einer Halbleitervorrichtung

Country Status (3)

Country Link
US (2) US5223083A (enExample)
JP (1) JP3803389B2 (enExample)
DE (1) DE4300983C2 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5403435A (en) * 1992-01-23 1995-04-04 Micron Technology, Inc. Process for selectively etching integrated circuit devices having deep trenches or troughs or elevated features with re-entrant profiles
US5271798A (en) * 1993-03-29 1993-12-21 Micron Technology, Inc. Method for selective removal of a material from a wafer's alignment marks
TW289864B (enExample) 1994-09-16 1996-11-01 Micron Display Tech Inc
US5975975A (en) * 1994-09-16 1999-11-02 Micron Technology, Inc. Apparatus and method for stabilization of threshold voltage in field emission displays
US6417605B1 (en) 1994-09-16 2002-07-09 Micron Technology, Inc. Method of preventing junction leakage in field emission devices
US5674354A (en) * 1995-09-29 1997-10-07 United Microelectronics Corporation Method for etching a conducting layer of the step-covered structure for semiconductor fabrication
US5770510A (en) * 1996-12-09 1998-06-23 Vanguard International Semiconductor Corporation Method for manufacturing a capacitor using non-conformal dielectric
US6103636A (en) * 1997-08-20 2000-08-15 Micron Technology, Inc. Method and apparatus for selective removal of material from wafer alignment marks
US6057084A (en) * 1997-10-03 2000-05-02 Fusion Systems Corporation Controlled amine poisoning for reduced shrinkage of features formed in photoresist
US6074569A (en) * 1997-12-09 2000-06-13 Hughes Electronics Corporation Stripping method for photoresist used as mask in Ch4 /H2 based reactive ion etching (RIE) of compound semiconductors
US6153532A (en) 1998-02-27 2000-11-28 Micron Technology, Inc. Methods and apparatuses for removing material from discrete areas on a semiconductor wafer
US6613681B1 (en) * 1998-08-28 2003-09-02 Micron Technology, Inc. Method of removing etch residues
US6159662A (en) * 1999-05-17 2000-12-12 Taiwan Semiconductor Manufacturing Company Photoresist development method with reduced cycle time and improved performance
US6290863B1 (en) 1999-07-31 2001-09-18 Micron Technology, Inc. Method and apparatus for etch of a specific subarea of a semiconductor work object
US6469436B1 (en) * 2000-01-14 2002-10-22 Micron Technology, Inc. Radiation shielding for field emitters
US6368886B1 (en) 2000-09-15 2002-04-09 The Charles Stark Draper Laboratory, Inc. Method of recovering encapsulated die
DE10054121B4 (de) * 2000-10-31 2006-06-14 Infineon Technologies Ag Verfahren zur Strukturierung einer Photolackschicht
US6934928B2 (en) * 2002-08-27 2005-08-23 Micron Technology, Inc. Method and apparatus for designing a pattern on a semiconductor surface
US6898779B2 (en) * 2002-08-28 2005-05-24 Micron Technology, Inc. Pattern generation on a semiconductor surface
JP2004228152A (ja) * 2003-01-20 2004-08-12 Shinko Electric Ind Co Ltd ウエハのダイシング方法
TWI315543B (en) * 2003-02-11 2009-10-01 Chunghwa Picture Tubes Ltd Lithoraphic process for multi-etching steps by using single reticle
US7867687B2 (en) * 2003-10-15 2011-01-11 Intel Corporation Methods and compositions for reducing line wide roughness
US7981698B2 (en) * 2007-03-09 2011-07-19 The Charles Stark Draper Laboratory, Inc. Removal of integrated circuits from packages
JP6726834B2 (ja) 2015-09-24 2020-07-22 東京エレクトロン株式会社 サブ解像度基板パターニングのためのエッチングマスクを形成する方法
CN111295723B (zh) 2018-03-14 2022-06-14 株式会社Lg化学 嵌入式透明电极基板及其制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4174217A (en) * 1974-08-02 1979-11-13 Rca Corporation Method for making semiconductor structure
US4310380A (en) * 1980-04-07 1982-01-12 Bell Telephone Laboratories, Incorporated Plasma etching of silicon
JPH0682783B2 (ja) * 1985-03-29 1994-10-19 三菱電機株式会社 容量およびその製造方法
US4826754A (en) * 1987-04-27 1989-05-02 Microelectronics Center Of North Carolina Method for anisotropically hardening a protective coating for integrated circuit manufacture
US4789646A (en) * 1987-07-20 1988-12-06 North American Philips Corporation, Signetics Division Company Method for selective surface treatment of semiconductor structures
KR930007192B1 (ko) * 1990-06-29 1993-07-31 삼성전자 주식회사 디램셀의 적층형캐패시터 및 제조방법

Also Published As

Publication number Publication date
US5223083A (en) 1993-06-29
JPH05283637A (ja) 1993-10-29
US5358599A (en) 1994-10-25
JP3803389B2 (ja) 2006-08-02
DE4300983C2 (de) 1998-11-05

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
R071 Expiry of right
R071 Expiry of right