DE3887552D1 - Zeitsteuerung für Doppelanschluss. - Google Patents

Zeitsteuerung für Doppelanschluss.

Info

Publication number
DE3887552D1
DE3887552D1 DE88302636T DE3887552T DE3887552D1 DE 3887552 D1 DE3887552 D1 DE 3887552D1 DE 88302636 T DE88302636 T DE 88302636T DE 3887552 T DE3887552 T DE 3887552T DE 3887552 D1 DE3887552 D1 DE 3887552D1
Authority
DE
Germany
Prior art keywords
ram
dptc
time control
local
double connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88302636T
Other languages
English (en)
Other versions
DE3887552T2 (de
Inventor
Dale E Gulick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE3887552D1 publication Critical patent/DE3887552D1/de
Application granted granted Critical
Publication of DE3887552T2 publication Critical patent/DE3887552T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Paper (AREA)
  • Interface Circuits In Exchanges (AREA)
DE3887552T 1987-04-02 1988-03-25 Zeitsteuerung für Doppelanschluss. Expired - Fee Related DE3887552T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/035,687 US4809269A (en) 1987-04-02 1987-04-02 Dual-port timing controller

Publications (2)

Publication Number Publication Date
DE3887552D1 true DE3887552D1 (de) 1994-03-17
DE3887552T2 DE3887552T2 (de) 1994-08-11

Family

ID=21884214

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3887552T Expired - Fee Related DE3887552T2 (de) 1987-04-02 1988-03-25 Zeitsteuerung für Doppelanschluss.

Country Status (5)

Country Link
US (1) US4809269A (de)
EP (1) EP0285329B1 (de)
JP (1) JP2717112B2 (de)
AT (1) ATE101292T1 (de)
DE (1) DE3887552T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4907186A (en) * 1987-02-09 1990-03-06 The United States Of America As Represented By The Secretary Of Commerce Data direct ingest system
EP0285330A3 (de) * 1987-04-03 1989-09-06 Advanced Micro Devices, Inc. Daten-Protokoll-Steuerung
JPS63310004A (ja) * 1987-06-12 1988-12-19 Omron Tateisi Electronics Co プログラマブル・コントロ−ラ
US5170470A (en) * 1988-05-02 1992-12-08 National Semiconductor Corp. Integrated modem which employs a host processor as its controller
FR2631183B1 (fr) * 1988-05-06 1991-02-22 Compex Procede et dispositif de transmission asynchrone de donnees par paquets
US5283869A (en) * 1989-07-25 1994-02-01 Allen-Bradley Company, Inc. Interrupt structure for network interface circuit
EP0489504B1 (de) * 1990-11-30 1997-03-05 International Business Machines Corporation Bidirektionaler FIFO-Puffer zur Schnittstellenbildung zwischen zwei Bussen
US5195089A (en) * 1990-12-31 1993-03-16 Sun Microsystems, Inc. Apparatus and method for a synchronous, high speed, packet-switched bus
US5301186A (en) * 1991-06-28 1994-04-05 Digital Equipment Corporation High speed transmission line interface
US5537654A (en) * 1993-05-20 1996-07-16 At&T Corp. System for PCMCIA peripheral to execute instructions from shared memory where the system reset signal causes switching between modes of operation by alerting the starting address
US5598579A (en) * 1994-04-25 1997-01-28 Compaq Computer Corporation System fpr transferring data between two buses using control registers writable by host processor connected to system bus and local processor coupled to local bus
US5832277A (en) * 1996-03-08 1998-11-03 3 Com Corporation System for arbitrating demand on memory during configuration of a computer add-on card
US6118776A (en) * 1997-02-18 2000-09-12 Vixel Corporation Methods and apparatus for fiber channel interconnection of private loop devices
US6185203B1 (en) 1997-02-18 2001-02-06 Vixel Corporation Fibre channel switching fabric
US6012121A (en) * 1997-04-08 2000-01-04 International Business Machines Corporation Apparatus for flexible control of interrupts in multiprocessor systems
US6201817B1 (en) * 1998-05-28 2001-03-13 3Com Corporation Memory based buffering for a UART or a parallel UART like interface
DE10032256C2 (de) 2000-07-03 2003-06-05 Infineon Technologies Ag Chip-ID-Register-Anordnung
US7206310B1 (en) * 2001-12-28 2007-04-17 Redback Networks Inc. Method and apparatus for replicating packet data with a network element
US7784062B2 (en) * 2004-06-18 2010-08-24 General Electric Company Event based operating system, method, and apparatus for instrumentation and control systems

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287705A (en) * 1963-03-07 1966-11-22 Rca Corp Computer system
US4290133A (en) * 1977-10-25 1981-09-15 Digital Equipment Corporation System timing means for data processing system
US4594657A (en) * 1983-04-22 1986-06-10 Motorola, Inc. Semaphore for memory shared by two asynchronous microcomputers
US4530093A (en) * 1983-07-05 1985-07-16 International Standard Electric Corporation PCM Telecommunications system for voice and data
JPS6143370A (ja) * 1984-08-03 1986-03-01 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション 多重処理システム
US4692918A (en) * 1984-12-17 1987-09-08 At&T Bell Laboratories Reliable local data network arrangement
US4637015A (en) * 1985-07-29 1987-01-13 Northern Telecom Limited Packet transmission and reception via a shared DMA channel
EP0285330A3 (de) * 1987-04-03 1989-09-06 Advanced Micro Devices, Inc. Daten-Protokoll-Steuerung

Also Published As

Publication number Publication date
EP0285329A2 (de) 1988-10-05
EP0285329A3 (en) 1989-08-30
JPS63257049A (ja) 1988-10-24
JP2717112B2 (ja) 1998-02-18
DE3887552T2 (de) 1994-08-11
US4809269A (en) 1989-02-28
EP0285329B1 (de) 1994-02-02
ATE101292T1 (de) 1994-02-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee