JPS57152066A - Opu communication system in multi-opu system - Google Patents

Opu communication system in multi-opu system

Info

Publication number
JPS57152066A
JPS57152066A JP3768381A JP3768381A JPS57152066A JP S57152066 A JPS57152066 A JP S57152066A JP 3768381 A JP3768381 A JP 3768381A JP 3768381 A JP3768381 A JP 3768381A JP S57152066 A JPS57152066 A JP S57152066A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
cpus
opu
interruption
system
semaphore
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3768381A
Inventor
Takao Morimoto
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox

Abstract

PURPOSE:To achieve high speed message transmission between CPUs, by making the most of a semaphore processor in a common memory and improving a connection of an interruption line between CPUs. CONSTITUTION:Interruption signal lines 6-1 and 6-2 are provided mutually between CPUs 2-1 and 2-2. The CPU2-2 directly receives an interruption signal transmitted from one CPU, e.g., the CPU2-1. The message and semaphore preset in a common memory 1 are discriminated by starting a semaphore device for interruption. Further, the message transmission between the CPUs 2-1 and 2-2 is achieved in high speed, by improving the connection of the interruption lines between the CPUs.
JP3768381A 1981-03-16 1981-03-16 Opu communication system in multi-opu system Pending JPS57152066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3768381A JPS57152066A (en) 1981-03-16 1981-03-16 Opu communication system in multi-opu system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3768381A JPS57152066A (en) 1981-03-16 1981-03-16 Opu communication system in multi-opu system

Publications (1)

Publication Number Publication Date
JPS57152066A true true JPS57152066A (en) 1982-09-20

Family

ID=12504390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3768381A Pending JPS57152066A (en) 1981-03-16 1981-03-16 Opu communication system in multi-opu system

Country Status (1)

Country Link
JP (1) JPS57152066A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101360A (en) * 1981-12-14 1983-06-16 Hitachi Ltd Data processor
JPS59205663A (en) * 1983-05-07 1984-11-21 Hitachi Control Syst Co Ltd Sequence controller having computer process mode
JPS60197551A (en) * 1984-03-16 1985-10-07 Omron Tateisi Electronics Co Paper pay-out control device
JPS60229162A (en) * 1984-04-27 1985-11-14 Hitachi Ltd Control system of multiprocessor
JPS60237566A (en) * 1984-05-10 1985-11-26 Oki Electric Ind Co Ltd Interprocessor communication system
JPS62295165A (en) * 1987-05-29 1987-12-22 Nec Corp Multiport ram
JPS6478358A (en) * 1987-09-19 1989-03-23 Canon Kk Data communication system
JPH06202883A (en) * 1992-09-24 1994-07-22 American Teleph & Telegr Co <Att> Device and method for inter-process communication

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101360A (en) * 1981-12-14 1983-06-16 Hitachi Ltd Data processor
JPS6326421B2 (en) * 1981-12-14 1988-05-30 Hitachi Seisakusho Kk
JPS59205663A (en) * 1983-05-07 1984-11-21 Hitachi Control Syst Co Ltd Sequence controller having computer process mode
JPS60197551A (en) * 1984-03-16 1985-10-07 Omron Tateisi Electronics Co Paper pay-out control device
JPS60229162A (en) * 1984-04-27 1985-11-14 Hitachi Ltd Control system of multiprocessor
JPS60237566A (en) * 1984-05-10 1985-11-26 Oki Electric Ind Co Ltd Interprocessor communication system
JPH0522939B2 (en) * 1984-05-10 1993-03-31 Oki Electric Ind Co Ltd
JPS62295165A (en) * 1987-05-29 1987-12-22 Nec Corp Multiport ram
JPS6478358A (en) * 1987-09-19 1989-03-23 Canon Kk Data communication system
JPH06202883A (en) * 1992-09-24 1994-07-22 American Teleph & Telegr Co <Att> Device and method for inter-process communication

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