JPS6413651A - Memory device - Google Patents

Memory device

Info

Publication number
JPS6413651A
JPS6413651A JP62169181A JP16918187A JPS6413651A JP S6413651 A JPS6413651 A JP S6413651A JP 62169181 A JP62169181 A JP 62169181A JP 16918187 A JP16918187 A JP 16918187A JP S6413651 A JPS6413651 A JP S6413651A
Authority
JP
Japan
Prior art keywords
buffer memory
written
data
storage device
disk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62169181A
Other languages
Japanese (ja)
Inventor
Tsuneyuki Ishino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62169181A priority Critical patent/JPS6413651A/en
Publication of JPS6413651A publication Critical patent/JPS6413651A/en
Pending legal-status Critical Current

Links

Landscapes

  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To save an operating time by supplying and writing the data from a central processing unit to a storage device without passing through a buffer memory and writing the data from the storage device without passing through the buffer memory. CONSTITUTION:By a first pulse from a logic circuit 5, the data from a central processing unit 11 are written into a buffer memory 4, supplied through a storage controller 2 into a storage device 3, and for example, written into a disk. By a second pulse from the logic circuit 5, for example, the data from the disk are supplied and written from the storage device 3 through the storage controller 2 to the buffer memory 4 and written into a memory 12. Thus, the operating time is saved and the noncoincidence with a buffer memory, for example, the contents of the disk is evaded.
JP62169181A 1987-07-07 1987-07-07 Memory device Pending JPS6413651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62169181A JPS6413651A (en) 1987-07-07 1987-07-07 Memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62169181A JPS6413651A (en) 1987-07-07 1987-07-07 Memory device

Publications (1)

Publication Number Publication Date
JPS6413651A true JPS6413651A (en) 1989-01-18

Family

ID=15881747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62169181A Pending JPS6413651A (en) 1987-07-07 1987-07-07 Memory device

Country Status (1)

Country Link
JP (1) JPS6413651A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03224043A (en) * 1990-01-30 1991-10-03 Fujitsu Ltd Data transfer control system for cache control part
JPH05100928A (en) * 1991-10-07 1993-04-23 Ricoh Co Ltd Filing system device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03224043A (en) * 1990-01-30 1991-10-03 Fujitsu Ltd Data transfer control system for cache control part
JPH05100928A (en) * 1991-10-07 1993-04-23 Ricoh Co Ltd Filing system device

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