JPS5442943A - Refresh system - Google Patents
Refresh systemInfo
- Publication number
- JPS5442943A JPS5442943A JP9610077A JP9610077A JPS5442943A JP S5442943 A JPS5442943 A JP S5442943A JP 9610077 A JP9610077 A JP 9610077A JP 9610077 A JP9610077 A JP 9610077A JP S5442943 A JPS5442943 A JP S5442943A
- Authority
- JP
- Japan
- Prior art keywords
- memory unit
- refresh system
- refresh
- trouble
- giving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Abstract
PURPOSE:To eliminate the execution error of the refresh without giving any trouble to the read/write action held between CPU and the memory unit, and thus to avoid destruction of the memory unit contents.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52096100A JPS5810800B2 (en) | 1977-08-12 | 1977-08-12 | refresh device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52096100A JPS5810800B2 (en) | 1977-08-12 | 1977-08-12 | refresh device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5442943A true JPS5442943A (en) | 1979-04-05 |
JPS5810800B2 JPS5810800B2 (en) | 1983-02-28 |
Family
ID=14155963
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52096100A Expired JPS5810800B2 (en) | 1977-08-12 | 1977-08-12 | refresh device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5810800B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0743931B2 (en) * | 1985-04-01 | 1995-05-15 | エイ・ティ・アンド・ティ グローバル インフォメーション ソルーションズ インターナショナル インコーポレイテッド | Memory system with refresh control means |
-
1977
- 1977-08-12 JP JP52096100A patent/JPS5810800B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0743931B2 (en) * | 1985-04-01 | 1995-05-15 | エイ・ティ・アンド・ティ グローバル インフォメーション ソルーションズ インターナショナル インコーポレイテッド | Memory system with refresh control means |
Also Published As
Publication number | Publication date |
---|---|
JPS5810800B2 (en) | 1983-02-28 |
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