DE3884151T2 - Verfahren zur herstellung eines halbleiterfeldoxids. - Google Patents
Verfahren zur herstellung eines halbleiterfeldoxids.Info
- Publication number
- DE3884151T2 DE3884151T2 DE88905313T DE3884151T DE3884151T2 DE 3884151 T2 DE3884151 T2 DE 3884151T2 DE 88905313 T DE88905313 T DE 88905313T DE 3884151 T DE3884151 T DE 3884151T DE 3884151 T2 DE3884151 T2 DE 3884151T2
- Authority
- DE
- Germany
- Prior art keywords
- producing
- field oxide
- semiconductor field
- semiconductor
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US6192387A | 1987-06-15 | 1987-06-15 | |
PCT/US1988/001787 WO1988010510A1 (en) | 1987-06-15 | 1988-05-31 | Semiconductor field oxide formation process |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3884151D1 DE3884151D1 (de) | 1993-10-21 |
DE3884151T2 true DE3884151T2 (de) | 1994-04-07 |
Family
ID=22039026
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88905313T Expired - Fee Related DE3884151T2 (de) | 1987-06-15 | 1988-05-31 | Verfahren zur herstellung eines halbleiterfeldoxids. |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0318555B1 (de) |
JP (1) | JP2747563B2 (de) |
DE (1) | DE3884151T2 (de) |
WO (1) | WO1988010510A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5248350A (en) * | 1990-11-30 | 1993-09-28 | Ncr Corporation | Structure for improving gate oxide integrity for a semiconductor formed by a recessed sealed sidewall field oxidation process |
FR2672731A1 (fr) * | 1991-02-07 | 1992-08-14 | France Telecom | Procede d'oxydation localisee enterree d'un substrat de silicium et circuit integre correspondant. |
EP0540157A1 (de) * | 1991-09-30 | 1993-05-05 | STMicroelectronics, Inc. | Verfahren zur Herstellung einer submikronen Isolierung für CMOS-Bauelemente |
KR100187678B1 (ko) * | 1993-11-23 | 1999-06-01 | 김영환 | 반도체 장치의 소자 분리막 형성방법 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4333965A (en) * | 1980-09-15 | 1982-06-08 | General Electric Company | Method of making integrated circuits |
JPS59139643A (ja) * | 1983-01-31 | 1984-08-10 | Hitachi Ltd | 半導体装置およびその製造方法 |
-
1988
- 1988-05-31 WO PCT/US1988/001787 patent/WO1988010510A1/en active IP Right Grant
- 1988-05-31 EP EP88905313A patent/EP0318555B1/de not_active Expired - Lifetime
- 1988-05-31 DE DE88905313T patent/DE3884151T2/de not_active Expired - Fee Related
- 1988-05-31 JP JP63505027A patent/JP2747563B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2747563B2 (ja) | 1998-05-06 |
JPH01503827A (ja) | 1989-12-21 |
WO1988010510A1 (en) | 1988-12-29 |
EP0318555B1 (de) | 1993-09-15 |
DE3884151D1 (de) | 1993-10-21 |
EP0318555A1 (de) | 1989-06-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: AT&T GLOBAL INFORMATION SOLUTIONS INTERNATIONAL IN |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: AT&T GLOBAL INFORMATION SOLUTIONS INTERNATIONAL IN |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DELAWAR |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DELAWAR |
|
8328 | Change in the person/name/address of the agent |
Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: HYNIX SEMICONDUCTOR INC., ICHON, KYONGGI, KR Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DEL, US |