DE3854561D1 - Verfahren zum Trockenätzen. - Google Patents

Verfahren zum Trockenätzen.

Info

Publication number
DE3854561D1
DE3854561D1 DE3854561T DE3854561T DE3854561D1 DE 3854561 D1 DE3854561 D1 DE 3854561D1 DE 3854561 T DE3854561 T DE 3854561T DE 3854561 T DE3854561 T DE 3854561T DE 3854561 D1 DE3854561 D1 DE 3854561D1
Authority
DE
Germany
Prior art keywords
dry etching
etching method
dry
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3854561T
Other languages
English (en)
Other versions
DE3854561T2 (de
Inventor
Tsunetoshi C O Patent Arikado
Yasuhiro C O Patent Div Horike
Makoto C O Patent Divis Sekine
Haruo C O Patent Divisio Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3854561D1 publication Critical patent/DE3854561D1/de
Application granted granted Critical
Publication of DE3854561T2 publication Critical patent/DE3854561T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE3854561T 1987-07-02 1988-07-01 Verfahren zum Trockenätzen. Expired - Lifetime DE3854561T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16586087 1987-07-02

Publications (2)

Publication Number Publication Date
DE3854561D1 true DE3854561D1 (de) 1995-11-16
DE3854561T2 DE3854561T2 (de) 1996-05-02

Family

ID=15820365

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3854561T Expired - Lifetime DE3854561T2 (de) 1987-07-02 1988-07-01 Verfahren zum Trockenätzen.

Country Status (4)

Country Link
US (1) US4878995A (de)
EP (1) EP0297898B1 (de)
KR (1) KR920005349B1 (de)
DE (1) DE3854561T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900013595A (ko) * 1989-02-15 1990-09-06 미다 가쓰시게 플라즈마 에칭방법 및 장치
EP0399676A1 (de) * 1989-05-01 1990-11-28 Tegal Corporation Doppeltemperatur-Plasma-Ätzen
US5032205A (en) * 1989-05-05 1991-07-16 Wisconsin Alumni Research Foundation Plasma etching apparatus with surface magnetic fields
AU8282691A (en) * 1990-07-20 1992-02-18 McGrew, Steven P. Embossing tool
US5223113A (en) * 1990-07-20 1993-06-29 Tokyo Electron Limited Apparatus for forming reduced pressure and for processing object
JPH0478133A (ja) * 1990-07-20 1992-03-12 Tokyo Electron Ltd プラズマ処理装置
US5221403A (en) * 1990-07-20 1993-06-22 Tokyo Electron Limited Support table for plate-like body and processing apparatus using the table
KR0155566B1 (ko) * 1990-07-20 1998-11-16 이노우에 아끼라 플라즈마 처리장치
JP2939355B2 (ja) * 1991-04-22 1999-08-25 東京エレクトロン株式会社 プラズマ処理装置
JPH04326725A (ja) * 1991-04-26 1992-11-16 Tokyo Electron Ltd プラズマ装置
JP3210359B2 (ja) * 1991-05-29 2001-09-17 株式会社東芝 ドライエッチング方法
TW204411B (de) * 1991-06-05 1993-04-21 Tokyo Electron Co Ltd
KR100297358B1 (ko) * 1991-07-23 2001-11-30 히가시 데쓰로 플라즈마에칭장치
US5411624A (en) * 1991-07-23 1995-05-02 Tokyo Electron Limited Magnetron plasma processing apparatus
US5226967A (en) * 1992-05-14 1993-07-13 Lam Research Corporation Plasma apparatus including dielectric window for inducing a uniform electric field in a plasma chamber
US5858477A (en) * 1996-12-10 1999-01-12 Akashic Memories Corporation Method for producing recording media having protective overcoats of highly tetrahedral amorphous carbon
US6500314B1 (en) * 1996-07-03 2002-12-31 Tegal Corporation Plasma etch reactor and method
US6417013B1 (en) 1999-01-29 2002-07-09 Plasma-Therm, Inc. Morphed processing of semiconductor devices
EP1858061B1 (de) * 2005-03-07 2011-10-19 Sharp Kabushiki Kaisha Plasmabehandlungsvorrichtung und halbleiter-dünnfilm-herstellungsverfahren damit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8204437A (nl) * 1982-11-16 1984-06-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met behulp van plasma-etsen.
JPS59124135A (ja) * 1982-12-28 1984-07-18 Toshiba Corp 反応性イオンエツチング方法
JPH07118474B2 (ja) * 1984-12-17 1995-12-18 ソニー株式会社 エツチングガス及びこれを用いたエツチング方法
US4572759A (en) * 1984-12-26 1986-02-25 Benzing Technology, Inc. Troide plasma reactor with magnetic enhancement
US4786361A (en) * 1986-03-05 1988-11-22 Kabushiki Kaisha Toshiba Dry etching process
DE3752140T2 (de) * 1986-09-05 1998-03-05 Hitachi Ltd Trockenes Ätzverfahren
US4789426A (en) * 1987-01-06 1988-12-06 Harris Corp. Process for performing variable selectivity polysilicon etch
JPS63238288A (ja) * 1987-03-27 1988-10-04 Fujitsu Ltd ドライエツチング方法
JPH06261238A (ja) * 1993-03-05 1994-09-16 Canon Inc 撮像装置

Also Published As

Publication number Publication date
EP0297898A3 (en) 1989-05-10
EP0297898A2 (de) 1989-01-04
DE3854561T2 (de) 1996-05-02
KR890002999A (ko) 1989-04-12
US4878995A (en) 1989-11-07
EP0297898B1 (de) 1995-10-11
KR920005349B1 (ko) 1992-07-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)