DE3825664A1 - Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten - Google Patents

Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten

Info

Publication number
DE3825664A1
DE3825664A1 DE19883825664 DE3825664A DE3825664A1 DE 3825664 A1 DE3825664 A1 DE 3825664A1 DE 19883825664 DE19883825664 DE 19883825664 DE 3825664 A DE3825664 A DE 3825664A DE 3825664 A1 DE3825664 A1 DE 3825664A1
Authority
DE
Germany
Prior art keywords
phase
voltage
locked loop
frequency
vco
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19883825664
Other languages
German (de)
English (en)
Other versions
DE3825664C2 (https=
Inventor
Bodo Dr Ing Harders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plath Corp GmbH
Original Assignee
C Plath GmbH Nautisch Elektronische Technik
Plath Corp GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by C Plath GmbH Nautisch Elektronische Technik, Plath Corp GmbH filed Critical C Plath GmbH Nautisch Elektronische Technik
Priority to DE19883825664 priority Critical patent/DE3825664A1/de
Publication of DE3825664A1 publication Critical patent/DE3825664A1/de
Application granted granted Critical
Publication of DE3825664C2 publication Critical patent/DE3825664C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06—Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE19883825664 1988-07-28 1988-07-28 Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten Granted DE3825664A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19883825664 DE3825664A1 (de) 1988-07-28 1988-07-28 Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19883825664 DE3825664A1 (de) 1988-07-28 1988-07-28 Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten

Publications (2)

Publication Number Publication Date
DE3825664A1 true DE3825664A1 (de) 1990-02-01
DE3825664C2 DE3825664C2 (https=) 1991-06-13

Family

ID=6359766

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883825664 Granted DE3825664A1 (de) 1988-07-28 1988-07-28 Phasenregelkreis mit automatischer kompensation von nichtlinearitaeten

Country Status (1)

Country Link
DE (1) DE3825664A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4031939A1 (de) * 1990-10-09 1992-05-07 Rohde & Schwarz Verfahren zum voreinstellen eines phasengeregelten oszillators auf einen vorgegebenen frequenzwert
EP2323262A3 (en) * 2009-11-16 2012-02-22 Electronics and Telecommunications Research Institute Phase locked loop and satellite communication terminal using the same

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD107829A1 (https=) * 1973-12-04 1974-08-12
EP0077589A1 (fr) * 1981-10-16 1983-04-27 Telecommunications Radioelectriques Et Telephoniques T.R.T. Synthétiseur de fréquence à accord rapide
US4568888A (en) * 1983-11-08 1986-02-04 Trw Inc. PLL Fast frequency synthesizer with memories for coarse tuning and loop gain correction
US4595886A (en) * 1984-10-19 1986-06-17 Rockwell International Corporation AC loop gain and DC prepositioning adjustment for phase locked loop
US4614917A (en) * 1984-05-01 1986-09-30 Tadiran Ltd. Millimeter wave frequency synthesizer with automatic loop gain correction and sophisticated lock search systems
DE3539493A1 (de) * 1985-11-07 1987-05-14 Licentia Gmbh Phasenregelschleife
DE3544622A1 (de) * 1985-12-17 1987-06-19 Siemens Ag Schaltungsanordnung fuer eine digitale pll-schaltung mit verkuerzter einrastdauer
DE3732225A1 (de) * 1987-02-20 1988-09-01 Hewlett Packard Co Festfrequenzkreis

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD107829A1 (https=) * 1973-12-04 1974-08-12
EP0077589A1 (fr) * 1981-10-16 1983-04-27 Telecommunications Radioelectriques Et Telephoniques T.R.T. Synthétiseur de fréquence à accord rapide
US4568888A (en) * 1983-11-08 1986-02-04 Trw Inc. PLL Fast frequency synthesizer with memories for coarse tuning and loop gain correction
US4614917A (en) * 1984-05-01 1986-09-30 Tadiran Ltd. Millimeter wave frequency synthesizer with automatic loop gain correction and sophisticated lock search systems
US4595886A (en) * 1984-10-19 1986-06-17 Rockwell International Corporation AC loop gain and DC prepositioning adjustment for phase locked loop
DE3539493A1 (de) * 1985-11-07 1987-05-14 Licentia Gmbh Phasenregelschleife
DE3544622A1 (de) * 1985-12-17 1987-06-19 Siemens Ag Schaltungsanordnung fuer eine digitale pll-schaltung mit verkuerzter einrastdauer
DE3732225A1 (de) * 1987-02-20 1988-09-01 Hewlett Packard Co Festfrequenzkreis

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
BRUCH, W.: "Horizontal-Synchronisierung in Fern- seh-Empfängern mit erweitertem Fangbereich". In: Telefunken-Zeitung, Juni 1961, H.132, S.102-113 *
GARDNER, F.M.: "Phaselock Techniques", 1979, S.121-125 *
YEAGER, R.: "Control and automate PLL phase-detector gain". In: MICROWAVES & RF, August 1986, S. 103-107 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4031939A1 (de) * 1990-10-09 1992-05-07 Rohde & Schwarz Verfahren zum voreinstellen eines phasengeregelten oszillators auf einen vorgegebenen frequenzwert
EP2323262A3 (en) * 2009-11-16 2012-02-22 Electronics and Telecommunications Research Institute Phase locked loop and satellite communication terminal using the same
US8731126B2 (en) 2009-11-16 2014-05-20 Electronics And Telecommunications Research Institute Phase locked loop and satellite communication terminal using the same

Also Published As

Publication number Publication date
DE3825664C2 (https=) 1991-06-13

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8339 Ceased/non-payment of the annual fee
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee