DE3788855D1 - Modulareingerichteter Speicherprüfer. - Google Patents
Modulareingerichteter Speicherprüfer.Info
- Publication number
- DE3788855D1 DE3788855D1 DE87114570T DE3788855T DE3788855D1 DE 3788855 D1 DE3788855 D1 DE 3788855D1 DE 87114570 T DE87114570 T DE 87114570T DE 3788855 T DE3788855 T DE 3788855T DE 3788855 D1 DE3788855 D1 DE 3788855D1
- Authority
- DE
- Germany
- Prior art keywords
- modular memory
- memory checker
- checker
- modular
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/934,046 US4730318A (en) | 1986-11-24 | 1986-11-24 | Modular organized storage tester |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3788855D1 true DE3788855D1 (de) | 1994-03-03 |
DE3788855T2 DE3788855T2 (de) | 1994-06-23 |
Family
ID=25464873
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3788855T Expired - Fee Related DE3788855T2 (de) | 1986-11-24 | 1987-10-06 | Modulareingerichteter Speicherprüfer. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4730318A (de) |
EP (1) | EP0268789B1 (de) |
JP (1) | JPH0650338B2 (de) |
DE (1) | DE3788855T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3773773D1 (de) * | 1986-06-25 | 1991-11-21 | Nec Corp | Pruefschaltung fuer eine speichereinrichtung mit willkuerlichem zugriff. |
GB2214314B (en) * | 1988-01-07 | 1992-01-02 | Genrad Ltd | Automatic circuit tester |
US4965799A (en) * | 1988-08-05 | 1990-10-23 | Microcomputer Doctors, Inc. | Method and apparatus for testing integrated circuit memories |
US5321700A (en) * | 1989-10-11 | 1994-06-14 | Teradyne, Inc. | High speed timing generator |
JP2831767B2 (ja) * | 1990-01-10 | 1998-12-02 | 株式会社アドバンテスト | 半導体メモリ試験装置 |
US5222067A (en) * | 1990-03-08 | 1993-06-22 | Terenix Co., Ltd. | Detection of pattern-sensitive faults in RAM by use of M-sequencers |
JP2813237B2 (ja) * | 1990-06-08 | 1998-10-22 | 株式会社アドバンテスト | Ic試験用クロック遅延時間の設定方法 |
US5195097A (en) * | 1990-10-19 | 1993-03-16 | International Business Machines Corporation | High speed tester |
FR2684208B1 (fr) * | 1990-10-30 | 1995-01-27 | Teradyne Inc | Circuit destine a fournir une information de periode. |
JPH05143476A (ja) * | 1991-11-20 | 1993-06-11 | Fujitsu Ltd | 命令キユーの診断方式 |
FR2733324B1 (fr) * | 1995-04-19 | 1997-05-30 | Schlumberger Ind Sa | Procede et equipement de test automatique en parallele de composants electroniques |
JP2976276B2 (ja) * | 1996-05-31 | 1999-11-10 | 安藤電気株式会社 | タイミング発生器 |
US6275962B1 (en) * | 1998-10-23 | 2001-08-14 | Teradyne, Inc. | Remote test module for automatic test equipment |
US20110087861A1 (en) * | 2009-10-12 | 2011-04-14 | The Regents Of The University Of Michigan | System for High-Efficiency Post-Silicon Verification of a Processor |
US20190056288A1 (en) * | 2017-08-17 | 2019-02-21 | Crystal Instruments Corporation | Integrated control system and method for environmental testing chamber |
US11726904B2 (en) | 2021-09-23 | 2023-08-15 | International Business Machines Corporation | Controlled input/output in progress state during testcase processing |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1354827A (en) * | 1971-08-25 | 1974-06-05 | Ibm | Data processing systems |
SE408985B (sv) * | 1977-12-27 | 1979-07-16 | Philips Svenska Ab | Pulsgenerator |
US4317200A (en) * | 1978-10-20 | 1982-02-23 | Vlsi Technology Research Association | Method and device for testing a sequential circuit divided into a plurality of partitions |
JPS5585265A (en) * | 1978-12-23 | 1980-06-27 | Toshiba Corp | Function test evaluation device for integrated circuit |
US4369511A (en) * | 1979-11-21 | 1983-01-18 | Nippon Telegraph & Telephone Public Corp. | Semiconductor memory test equipment |
JPS6030973B2 (ja) * | 1980-01-18 | 1985-07-19 | 日本電気株式会社 | 高速パタ−ン発生器 |
DE3047239C2 (de) * | 1980-12-16 | 1982-12-30 | Wandel & Goltermann Gmbh & Co, 7412 Eningen | Verfahren und Schaltungsanordnung zum Messen der Güte digitaler Übertragungsstrecken und -einrichtungen |
JPS57173220A (en) * | 1981-04-17 | 1982-10-25 | Toshiba Corp | Comparator circuit |
US4433414A (en) * | 1981-09-30 | 1984-02-21 | Fairchild Camera And Instrument Corporation | Digital tester local memory data storage system |
US4450560A (en) * | 1981-10-09 | 1984-05-22 | Teradyne, Inc. | Tester for LSI devices and memory devices |
US4451918A (en) * | 1981-10-09 | 1984-05-29 | Teradyne, Inc. | Test signal reloader |
US4456995A (en) * | 1981-12-18 | 1984-06-26 | International Business Machines Corporation | Apparatus for high speed fault mapping of large memories |
JPS5990067A (ja) * | 1982-11-15 | 1984-05-24 | Advantest Corp | 論理回路試験用パタ−ン発生装置 |
US4649516A (en) * | 1984-06-01 | 1987-03-10 | International Business Machines Corp. | Dynamic row buffer circuit for DRAM |
US4696005A (en) * | 1985-06-03 | 1987-09-22 | International Business Machines Corporation | Apparatus for reducing test data storage requirements for high speed VLSI circuit testing |
US4635261A (en) * | 1985-06-26 | 1987-01-06 | Motorola, Inc. | On chip test system for configurable gate arrays |
US4682330A (en) * | 1985-10-11 | 1987-07-21 | International Business Machines Corporation | Hierarchical test system architecture |
-
1986
- 1986-11-24 US US06/934,046 patent/US4730318A/en not_active Expired - Lifetime
-
1987
- 1987-07-23 JP JP62182444A patent/JPH0650338B2/ja not_active Expired - Lifetime
- 1987-10-06 DE DE3788855T patent/DE3788855T2/de not_active Expired - Fee Related
- 1987-10-06 EP EP87114570A patent/EP0268789B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0650338B2 (ja) | 1994-06-29 |
DE3788855T2 (de) | 1994-06-23 |
EP0268789B1 (de) | 1994-01-19 |
EP0268789A2 (de) | 1988-06-01 |
US4730318A (en) | 1988-03-08 |
JPS63140966A (ja) | 1988-06-13 |
EP0268789A3 (en) | 1990-04-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |