DE3728337C2 - - Google Patents

Info

Publication number
DE3728337C2
DE3728337C2 DE19873728337 DE3728337A DE3728337C2 DE 3728337 C2 DE3728337 C2 DE 3728337C2 DE 19873728337 DE19873728337 DE 19873728337 DE 3728337 A DE3728337 A DE 3728337A DE 3728337 C2 DE3728337 C2 DE 3728337C2
Authority
DE
Germany
Prior art keywords
printer
computer
copper
exposed
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19873728337
Other languages
German (de)
English (en)
Other versions
DE3728337A1 (de
Inventor
Des Erfinders Auf Nennung Verzicht
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Goerlitz Computerbau 5400 Koblenz De GmbH
Original Assignee
Goerlitz Computerbau 5400 Koblenz De GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goerlitz Computerbau 5400 Koblenz De GmbH filed Critical Goerlitz Computerbau 5400 Koblenz De GmbH
Priority to DE19873728337 priority Critical patent/DE3728337A1/de
Publication of DE3728337A1 publication Critical patent/DE3728337A1/de
Application granted granted Critical
Publication of DE3728337C2 publication Critical patent/DE3728337C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0082—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the exposure method of radiation-sensitive masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0195—Tool for a process not provided for in H05K3/00, e.g. tool for handling objects using suction, for deforming objects, for applying local pressure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0548—Masks
    • H05K2203/0551—Exposure mask directly printed on the PCB

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
DE19873728337 1987-08-25 1987-08-25 Verfahren zur herstellung von geaetzten leiterplatten Granted DE3728337A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19873728337 DE3728337A1 (de) 1987-08-25 1987-08-25 Verfahren zur herstellung von geaetzten leiterplatten

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19873728337 DE3728337A1 (de) 1987-08-25 1987-08-25 Verfahren zur herstellung von geaetzten leiterplatten

Publications (2)

Publication Number Publication Date
DE3728337A1 DE3728337A1 (de) 1989-03-16
DE3728337C2 true DE3728337C2 (enrdf_load_stackoverflow) 1990-02-01

Family

ID=6334446

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873728337 Granted DE3728337A1 (de) 1987-08-25 1987-08-25 Verfahren zur herstellung von geaetzten leiterplatten

Country Status (1)

Country Link
DE (1) DE3728337A1 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10311510A1 (de) * 2003-03-15 2004-09-23 Deere & Company, Moline Verfahren und Vorrichtung zur Herstellung einer Leiterplatte

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4991287A (en) * 1989-12-26 1991-02-12 Eastman Kodak Company Method for fabricating printed circuit boards
AU3974295A (en) * 1994-12-09 1996-06-26 Theophil-Johannes Melicher Direct and selective process for applying protective layers
ATE434259T1 (de) 1997-10-14 2009-07-15 Patterning Technologies Ltd Methode zur herstellung eines elektrischen kondensators
US7323634B2 (en) 1998-10-14 2008-01-29 Patterning Technologies Limited Method of forming an electronic device
CA2375365A1 (en) 1999-05-27 2001-02-15 Patterning Technologies Limited Method of forming a masking pattern on a surface
GB2350321A (en) * 1999-05-27 2000-11-29 Patterning Technologies Ltd Method of forming a masking or spacer pattern on a substrate using inkjet droplet deposition
DE10121548B4 (de) 2001-05-03 2004-07-15 Epcos Ag Verfahren zur Herstellung einer Benetzungsbarriere und Anode mit der Benetzungsbarriere
MX2021008757A (es) 2019-01-29 2021-08-24 Henkel Ag & Co Kgaa Superficie de impresion controlada y metodo de formacion de caracteristicas topograficas en una superficie de impresion controlada.

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2316178C3 (de) * 1973-03-31 1975-09-11 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Herstellung mehrlagiger Leiterbahnenstrukturen auf einem Substrat mittels eines programmgesteuerten, für die Leiterbahnenherstellung herangezogenen Werkzeuges
JPS556833A (en) * 1978-06-29 1980-01-18 Nippon Mektron Kk Cirucit board and method of manufacturing same
DE3047884A1 (de) * 1980-12-18 1982-07-15 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zur automatisierbaren bearbeitung in der halbleitertechnologie, z.b. von leiterplatten

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10311510A1 (de) * 2003-03-15 2004-09-23 Deere & Company, Moline Verfahren und Vorrichtung zur Herstellung einer Leiterplatte

Also Published As

Publication number Publication date
DE3728337A1 (de) 1989-03-16

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee