DE3711592A1 - Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales - Google Patents

Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales

Info

Publication number
DE3711592A1
DE3711592A1 DE19873711592 DE3711592A DE3711592A1 DE 3711592 A1 DE3711592 A1 DE 3711592A1 DE 19873711592 DE19873711592 DE 19873711592 DE 3711592 A DE3711592 A DE 3711592A DE 3711592 A1 DE3711592 A1 DE 3711592A1
Authority
DE
Germany
Prior art keywords
phase
signal
frequency
shifted
halved
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19873711592
Other languages
German (de)
English (en)
Other versions
DE3711592C2 (enrdf_load_stackoverflow
Inventor
Hans-Martin Prof Dr Rein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
ANT Nachrichtentechnik GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ANT Nachrichtentechnik GmbH filed Critical ANT Nachrichtentechnik GmbH
Priority to DE19873711592 priority Critical patent/DE3711592A1/de
Priority to DE19883822857 priority patent/DE3822857C1/de
Priority to DE19883822858 priority patent/DE3822858A1/de
Publication of DE3711592A1 publication Critical patent/DE3711592A1/de
Application granted granted Critical
Publication of DE3711592C2 publication Critical patent/DE3711592C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00163—Layout of the delay element using bipolar transistors
    • H03K2005/00176—Layout of the delay element using bipolar transistors using differential stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00163—Layout of the delay element using bipolar transistors
    • H03K2005/00182—Layout of the delay element using bipolar transistors using constant current sources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/0015—Layout of the delay element
    • H03K2005/00228—Layout of the delay element having complementary input and output signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
DE19873711592 1987-04-06 1987-04-06 Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales Granted DE3711592A1 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE19873711592 DE3711592A1 (de) 1987-04-06 1987-04-06 Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales
DE19883822857 DE3822857C1 (en) 1987-04-06 1988-07-06 Method and circuit arrangement for producing a phase-shifted clock signal
DE19883822858 DE3822858A1 (de) 1987-04-06 1988-07-06 Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen taktsignales

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19873711592 DE3711592A1 (de) 1987-04-06 1987-04-06 Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales

Publications (2)

Publication Number Publication Date
DE3711592A1 true DE3711592A1 (de) 1988-10-20
DE3711592C2 DE3711592C2 (enrdf_load_stackoverflow) 1989-08-31

Family

ID=6324984

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873711592 Granted DE3711592A1 (de) 1987-04-06 1987-04-06 Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales

Country Status (1)

Country Link
DE (1) DE3711592A1 (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0349715A3 (en) * 1988-07-06 1990-09-26 Ant Nachrichtentechnik Gmbh Method and circuit for producing a phase-delayed clock signal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3546131C1 (en) * 1985-12-24 1987-02-12 Ant Nachrichtentech Clock generation in a broadband multiplexer or demultiplexer
DE3546132A1 (de) * 1985-12-24 1987-07-02 Ant Nachrichtentech Schaltungsanordnung zur erzeugung zweier takte

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3546131C1 (en) * 1985-12-24 1987-02-12 Ant Nachrichtentech Clock generation in a broadband multiplexer or demultiplexer
DE3546132A1 (de) * 1985-12-24 1987-07-02 Ant Nachrichtentech Schaltungsanordnung zur erzeugung zweier takte

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DAWSON, P.A., ROGERSON, S.P., An Undersea Fiber-Optic Regenerator Using an Integral- Substrate Package and Flip-Chip SAW Mounting, in: Journal of Lightwave Technology, 1984, No.6, S.926-932 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0349715A3 (en) * 1988-07-06 1990-09-26 Ant Nachrichtentechnik Gmbh Method and circuit for producing a phase-delayed clock signal

Also Published As

Publication number Publication date
DE3711592C2 (enrdf_load_stackoverflow) 1989-08-31

Similar Documents

Publication Publication Date Title
DE69623770T2 (de) Phasenschieber und verfahren zur phasenverschiebung
DE69120562T2 (de) Subnanosekunde kalibrierte Verzögerungsleitungsstruktur
DE69529960T2 (de) Phasendetektor mit ternärem Ausgang
DE2637381C2 (de) Zeitsteuerungswiedergewinnungsschaltung
DE69416404T2 (de) Fadingsimulator
EP0349715B1 (de) Verfahren und Schaltungsanordnung zur Erzeugung eines phasenverschobenen Taktsignales
DE69500243T2 (de) Phasenvergleicher für ein digitales Signal und ein Taktsignal, und entsprechender Phasenregelkreis
DE19818976A1 (de) Phasenerfassungsvorrichtung und Phasenerfassungsverfahren
DE112019007073B4 (de) Phasensynchronisierungsschaltung
DE2015812A1 (de) Hochfrequenz Leistungsverstärker
DE4004195C2 (de) Schaltungsanordnung zur Erzeugung eines mit einem Referenzsignal verkoppelten Signals
DE10130123B4 (de) Verzögerungsregelkreis zur Erzeugung komplementärer Taktsignale
DE68920089T2 (de) Schaltung zur Verarbeitung eines sich zeitlich ändernden Signals.
DE2311530A1 (de) Generator zur erzeugung eines signalverlaufs
DE2619964A1 (de) Anordnung zur impuls-zeitlagekorrektur
DE69511628T2 (de) Pulserzeugung
DE69214025T2 (de) Geregelte Verzögerungsleitung
DE69806662T2 (de) Interpolationsschaltung
EP0303916A2 (de) Taktstromversorgung
DE3822857C1 (en) Method and circuit arrangement for producing a phase-shifted clock signal
DE3711592A1 (de) Verfahren und schaltungsanordnung zur erzeugung eines phasenverschobenen digitalen signales
DE3546132C2 (enrdf_load_stackoverflow)
DE102014118284B4 (de) Quantisierer
DE68914564T2 (de) Selbsttätige Phasensteuerschaltung.
EP0465713B1 (de) CMOS-Schaltung für mittelwertbildende Digital-Analogumsetzer

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
AG Has addition no.

Ref country code: DE

Ref document number: 3822857

Format of ref document f/p: P

AG Has addition no.

Ref country code: DE

Ref document number: 3822858

Format of ref document f/p: P

8364 No opposition during term of opposition
AG Has addition no.

Ref country code: DE

Ref document number: 3822858

Format of ref document f/p: P

8327 Change in the person/name/address of the patent owner

Owner name: ROBERT BOSCH GMBH, 70469 STUTTGART, DE

8339 Ceased/non-payment of the annual fee