DE3678868D1 - Schutzlackbeschichtungsverfahren. - Google Patents

Schutzlackbeschichtungsverfahren.

Info

Publication number
DE3678868D1
DE3678868D1 DE8686107872T DE3678868T DE3678868D1 DE 3678868 D1 DE3678868 D1 DE 3678868D1 DE 8686107872 T DE8686107872 T DE 8686107872T DE 3678868 T DE3678868 T DE 3678868T DE 3678868 D1 DE3678868 D1 DE 3678868D1
Authority
DE
Germany
Prior art keywords
coating process
lacquer coating
protective lacquer
protective
lacquer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686107872T
Other languages
English (en)
Inventor
Tetsuo Ito
Masaya Tanuma
Yoshiyuki Nakagomi
Kazuya Kadota
Kazunari Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3678868D1 publication Critical patent/DE3678868D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • G03F7/162—Coating on a rotating support, e.g. using a whirler or a spinner
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/136—Coating process making radiation sensitive element

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Formation Of Insulating Films (AREA)
DE8686107872T 1985-06-12 1986-06-10 Schutzlackbeschichtungsverfahren. Expired - Lifetime DE3678868D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60126133A JPS61285716A (ja) 1985-06-12 1985-06-12 レジスト塗布方法

Publications (1)

Publication Number Publication Date
DE3678868D1 true DE3678868D1 (de) 1991-05-29

Family

ID=14927484

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686107872T Expired - Lifetime DE3678868D1 (de) 1985-06-12 1986-06-10 Schutzlackbeschichtungsverfahren.

Country Status (6)

Country Link
US (1) US4738910A (de)
EP (1) EP0205148B1 (de)
JP (1) JPS61285716A (de)
KR (1) KR900001665B1 (de)
CN (1) CN86103644B (de)
DE (1) DE3678868D1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5393624A (en) * 1988-07-29 1995-02-28 Tokyo Electron Limited Method and apparatus for manufacturing a semiconductor device
US4971931A (en) * 1990-02-12 1990-11-20 Eastman Kodak Company Diffuser features for spin-coated films
US5622747A (en) * 1991-09-18 1997-04-22 National Semiconductor Corporation Method for dispensing a layer of photoresist on a wafer without spinning the wafer
US5320918A (en) * 1992-12-31 1994-06-14 At&T Bell Laboratories Optical lithographical imaging system including optical transmission diffraction devices
US6221787B1 (en) * 1998-04-20 2001-04-24 Tokyo Electron Limited Apparatus and method of forming resist film
US6410194B1 (en) * 1999-02-04 2002-06-25 Tokyo Electron Limited Resist film forming method and resist coating apparatus
GB9916730D0 (en) 1999-07-16 1999-09-15 Mitel Semiconductor Ltd Integrated circuit manufacture
KR101074952B1 (ko) * 2004-08-31 2011-10-18 엘지디스플레이 주식회사 포토레지스트 코팅장치 및 코팅방법
JP4621485B2 (ja) * 2004-11-29 2011-01-26 株式会社東芝 パタンデータ検証方法、パタンデータ作成方法、露光用マスクの製造方法およびプログラム
FR2969772B1 (fr) 2010-12-22 2012-12-28 Commissariat Energie Atomique Procédé de lithographie par nano impression
KR102212361B1 (ko) 2019-07-05 2021-02-04 국방과학연구소 레이저음향기기를 이용한 수중표적 공격용 양상태 탐지시스템 및 탐지방법
KR102477169B1 (ko) * 2022-06-10 2022-12-14 엘아이지넥스원 주식회사 해수 유동을 고려한 소화포 제어 방법 및 그를 위한 장치

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50136333A (de) * 1974-04-17 1975-10-29
JPS53110376A (en) * 1977-03-09 1978-09-27 Hitachi Ltd Resist coating method
JPS5778140A (en) * 1980-10-31 1982-05-15 Hoya Corp Forming method for photoresist film
JPS5851514A (ja) * 1981-09-22 1983-03-26 Toshiba Corp ウエハ露光方法及びその装置
JPS599919A (ja) * 1982-07-08 1984-01-19 M Setetsuku Kk フオトレジストの塗布方法
JPS59151424A (ja) * 1983-02-18 1984-08-29 Hitachi Ltd 塗布装置
JPS59155925A (ja) * 1983-02-25 1984-09-05 Matsushita Electric Ind Co Ltd 塗布装置および塗布方法
JPS59155930A (ja) * 1983-02-25 1984-09-05 Mitsubishi Electric Corp 微細パタ−ンの形成方法
JPS59155927A (ja) * 1983-02-25 1984-09-05 Matsushita Electric Ind Co Ltd パタ−ン形成方法
JPS59155921A (ja) * 1983-02-25 1984-09-05 Fujitsu Ltd レジストパタ−ンの形成方法

Also Published As

Publication number Publication date
KR900001665B1 (ko) 1990-03-17
CN86103644B (zh) 1988-11-23
EP0205148A2 (de) 1986-12-17
EP0205148B1 (de) 1991-04-24
JPS61285716A (ja) 1986-12-16
US4738910A (en) 1988-04-19
CN86103644A (zh) 1987-04-29
EP0205148A3 (en) 1988-12-28
KR870000748A (ko) 1987-02-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee