DE3635394C2 - - Google Patents

Info

Publication number
DE3635394C2
DE3635394C2 DE3635394A DE3635394A DE3635394C2 DE 3635394 C2 DE3635394 C2 DE 3635394C2 DE 3635394 A DE3635394 A DE 3635394A DE 3635394 A DE3635394 A DE 3635394A DE 3635394 C2 DE3635394 C2 DE 3635394C2
Authority
DE
Germany
Prior art keywords
data
command
read
memory
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3635394A
Other languages
German (de)
English (en)
Other versions
DE3635394A1 (de
Inventor
Shigeo Odawara Jp Honma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HGST Japan Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3635394A1 publication Critical patent/DE3635394A1/de
Application granted granted Critical
Publication of DE3635394C2 publication Critical patent/DE3635394C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Communication Control (AREA)
  • Bus Control (AREA)
DE19863635394 1985-10-18 1986-10-17 Verfahren zur datenuebertragungssteuerung Granted DE3635394A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60231138A JPH087662B2 (ja) 1985-10-18 1985-10-18 データ転送制御方法

Publications (2)

Publication Number Publication Date
DE3635394A1 DE3635394A1 (de) 1987-04-23
DE3635394C2 true DE3635394C2 (enExample) 1989-08-10

Family

ID=16918876

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19863635394 Granted DE3635394A1 (de) 1985-10-18 1986-10-17 Verfahren zur datenuebertragungssteuerung

Country Status (4)

Country Link
US (1) US4903195A (enExample)
JP (1) JPH087662B2 (enExample)
KR (1) KR900006353B1 (enExample)
DE (1) DE3635394A1 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910000590B1 (ko) * 1988-03-14 1991-01-26 배만희 컴퓨터의 미러(Mirror) 디스크램 시스템
US5267097A (en) * 1989-03-06 1993-11-30 Hitachi, Ltd. Information transfer control system having rotary storage unit which uses a pseudo address mark
JPH02231621A (ja) * 1989-03-06 1990-09-13 Hitachi Ltd 回転記憶装置における情報転送方式
DE69028462T2 (de) * 1989-08-11 1997-03-27 Ibm Vorrichtung zur Verbindung von einer Steuereinheit mit parallelem Bus mit einem Kanal mit serieller Verbindung
US5268884A (en) * 1989-09-13 1993-12-07 Fujitsu Limited Seek control method and apparatus for disk apparatus
JP3242912B2 (ja) * 1989-10-10 2001-12-25 ストレイジ テクノロジー コーポレイション 多段データ読取り装置
US5293606A (en) * 1991-04-02 1994-03-08 Commodore Electronics Limited Apparatus and method for transferring interleaved data objects in mass storage devices into separate destinations in memory
JP3087429B2 (ja) * 1992-04-03 2000-09-11 株式会社日立製作所 記憶装置システム
ATE347709T1 (de) * 1994-09-14 2006-12-15 Intel Corp Editiersystem mit vorabzwischenspeicherung welches abfolgelisten verwendet
US6339811B1 (en) * 1999-04-21 2002-01-15 Seagate Technologh Llc Rotationally optimized seek initiation
US7610466B2 (en) * 2003-09-05 2009-10-27 Freescale Semiconductor, Inc. Data processing system using independent memory and register operand size specifiers and method thereof
US7315932B2 (en) * 2003-09-08 2008-01-01 Moyer William C Data processing system having instruction specifiers for SIMD register operands and method thereof
US7275148B2 (en) * 2003-09-08 2007-09-25 Freescale Semiconductor, Inc. Data processing system using multiple addressing modes for SIMD operations and method thereof
US7332883B1 (en) 2005-06-17 2008-02-19 Marvell International Ltd. Method and apparatus for initializing operation of a disk drive

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4075691A (en) * 1975-11-06 1978-02-21 Bunker Ramo Corporation Communication control unit
US4067059A (en) * 1976-01-29 1978-01-03 Sperry Rand Corporation Shared direct memory access controller
JPS5362945A (en) * 1976-11-17 1978-06-05 Toshiba Corp Disc address system
US4183084A (en) * 1977-06-06 1980-01-08 Digital Equipment Corporation Secondary storage facility with serial transfer of control messages
JPS5446439A (en) * 1977-09-19 1979-04-12 Nec Corp Magnetic disc controller
US4207609A (en) * 1978-05-08 1980-06-10 International Business Machines Corporation Method and means for path independent device reservation and reconnection in a multi-CPU and shared device access system
JPS5534783A (en) * 1978-09-04 1980-03-11 Fujitsu Ltd Interruption processing method in magnetic disk memory system
US4482982A (en) * 1980-09-29 1984-11-13 Honeywell Information Systems Inc. Communication multiplexer sharing a free running timer among multiple communication lines
US4420807A (en) * 1981-08-31 1983-12-13 International Business Machines Corporation Selectively holding data in a buffer for defective backing store tracks
US4543626A (en) * 1982-12-06 1985-09-24 Digital Equipment Corporation Apparatus and method for controlling digital data processing system employing multiple processors
JPS6041123A (ja) * 1983-08-15 1985-03-04 Nippon Telegr & Teleph Corp <Ntt> 磁気デイスク制御装置
JPS6068430A (ja) * 1983-09-22 1985-04-19 Mitsubishi Electric Corp 磁気デイスク制御方式
JPS60150128A (ja) * 1984-01-13 1985-08-07 Hitachi Ltd 回転形磁気記憶制御装置のバツフアメモリ制御装置

Also Published As

Publication number Publication date
KR870004380A (ko) 1987-05-09
DE3635394A1 (de) 1987-04-23
JPS6292022A (ja) 1987-04-27
US4903195A (en) 1990-02-20
JPH087662B2 (ja) 1996-01-29
KR900006353B1 (ko) 1990-08-28

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HITACHI GLOBAL STORAGE TECHNOLOGIES JAPAN, LTD., O