DE3618128A1 - Verfahren zur herstellung eines mos-kondensators - Google Patents

Verfahren zur herstellung eines mos-kondensators

Info

Publication number
DE3618128A1
DE3618128A1 DE19863618128 DE3618128A DE3618128A1 DE 3618128 A1 DE3618128 A1 DE 3618128A1 DE 19863618128 DE19863618128 DE 19863618128 DE 3618128 A DE3618128 A DE 3618128A DE 3618128 A1 DE3618128 A1 DE 3618128A1
Authority
DE
Germany
Prior art keywords
capacitor
manufacturing
layer
mos capacitor
insulation layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19863618128
Other languages
German (de)
English (en)
Other versions
DE3618128C2 (https=
Inventor
Keitaro Imai
Kikuo Yamabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP60118101A external-priority patent/JPH0618248B2/ja
Priority claimed from JP60116384A external-priority patent/JPS61276226A/ja
Priority claimed from JP61003104A external-priority patent/JPS62160731A/ja
Priority claimed from JP61008959A external-priority patent/JP2602808B2/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3618128A1 publication Critical patent/DE3618128A1/de
Application granted granted Critical
Publication of DE3618128C2 publication Critical patent/DE3618128C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01346—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a gaseous ambient using an oxygen or a water vapour, e.g. oxidation through a layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
DE19863618128 1985-05-31 1986-05-30 Verfahren zur herstellung eines mos-kondensators Granted DE3618128A1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP60118101A JPH0618248B2 (ja) 1985-05-31 1985-05-31 半導体装置の製造方法
JP60116384A JPS61276226A (ja) 1985-05-31 1985-05-31 半導体装置の製造方法
JP61003104A JPS62160731A (ja) 1986-01-10 1986-01-10 半導体装置の製造方法
JP61008959A JP2602808B2 (ja) 1986-01-21 1986-01-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE3618128A1 true DE3618128A1 (de) 1986-12-04
DE3618128C2 DE3618128C2 (https=) 1992-07-02

Family

ID=27453783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19863618128 Granted DE3618128A1 (de) 1985-05-31 1986-05-30 Verfahren zur herstellung eines mos-kondensators

Country Status (3)

Country Link
US (1) US4735824A (https=)
KR (1) KR900000064B1 (https=)
DE (1) DE3618128A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675530A3 (en) * 1994-03-31 1997-10-08 Nippon Denso Co Manufacturing method for a field effect semiconductor device.

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5258332A (en) * 1987-08-28 1993-11-02 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor devices including rounding of corner portions by etching
KR940003218B1 (ko) * 1988-03-24 1994-04-16 세이꼬 엡슨 가부시끼가이샤 반도체 장치 및 그 제조방법
US5612260A (en) * 1992-06-05 1997-03-18 Cree Research, Inc. Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures
JP3396553B2 (ja) * 1994-02-04 2003-04-14 三菱電機株式会社 半導体装置の製造方法及び半導体装置
US5780324A (en) * 1994-03-30 1998-07-14 Denso Corporation Method of manufacturing a vertical semiconductor device
EP0675529A3 (en) * 1994-03-30 1998-06-03 Denso Corporation Process for manufacturing vertical MOS transistors
US6478263B1 (en) * 1997-01-17 2002-11-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
US5985740A (en) 1996-01-19 1999-11-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device including reduction of a catalyst
JP3645379B2 (ja) * 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645380B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法、情報端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、ビデオカメラ、投射型表示装置
JP3645378B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3729955B2 (ja) 1996-01-19 2005-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
US5888858A (en) 1996-01-20 1999-03-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
US7056381B1 (en) 1996-01-26 2006-06-06 Semiconductor Energy Laboratory Co., Ltd. Fabrication method of semiconductor device
US6180439B1 (en) * 1996-01-26 2001-01-30 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device
US6465287B1 (en) 1996-01-27 2002-10-15 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
US6063654A (en) * 1996-02-20 2000-05-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a thin film transistor involving laser treatment
US6100562A (en) 1996-03-17 2000-08-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
KR19990003490A (ko) * 1997-06-25 1999-01-15 김영환 반도체 소자의 산화막 형성방법
JP3917327B2 (ja) * 1999-06-01 2007-05-23 株式会社ルネサステクノロジ 半導体装置の製造方法及び装置
US6150234A (en) * 1999-12-16 2000-11-21 Vlsi Technology, Inc. Trench-diffusion corner rounding in a shallow-trench (STI) process
JP2003179148A (ja) * 2001-10-04 2003-06-27 Denso Corp 半導体基板およびその製造方法
TW200409230A (en) * 2002-11-28 2004-06-01 Au Optronics Corp Method for avoiding non-uniform etching of silicon layer
US8859389B2 (en) * 2011-01-28 2014-10-14 Kabushiki Kaisha Toshiba Methods of making fins and fin field effect transistors (FinFETs)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0135942A2 (en) * 1983-09-28 1985-04-03 Hitachi, Ltd. Semiconductor memory and method of producing the same
DE3513034A1 (de) * 1984-04-11 1985-10-24 Hitachi, Ltd., Tokio/Tokyo Halbleitervorrichtung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3947299A (en) * 1971-05-22 1976-03-30 U.S. Philips Corporation Method of manufacturing semiconductor devices
US4139785A (en) * 1977-05-31 1979-02-13 Texas Instruments Incorporated Static memory cell with inverted field effect transistor
DE2967704D1 (de) * 1978-06-14 1991-06-13 Fujitsu Ltd Verfahren zur herstellung einer halbleiteranordnung mit einer isolierschicht.
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
JPS5583268A (en) * 1978-12-19 1980-06-23 Nec Corp Complementary mos semiconductor device and method of fabricating the same
JPS60111436A (ja) * 1983-11-22 1985-06-17 Toshiba Corp 半導体装置の製造方法
JPS60223153A (ja) * 1984-04-19 1985-11-07 Nippon Telegr & Teleph Corp <Ntt> Ｍｉｓ型キャパシタを有する半導体装置の製法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0135942A2 (en) * 1983-09-28 1985-04-03 Hitachi, Ltd. Semiconductor memory and method of producing the same
DE3513034A1 (de) * 1984-04-11 1985-10-24 Hitachi, Ltd., Tokio/Tokyo Halbleitervorrichtung

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
US-Z.: Appl. Phys. Lett., Bd. 45, 1984, S. 1312-1314 *
US-Z.: J. Electrochem. Soc., Bd. 125, No. 5, 1978, S. 339-346 *
US-Z.: J. Electrochem. Soc., Bd. 126, No. 7, 1979, S. 1288-1294 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675530A3 (en) * 1994-03-31 1997-10-08 Nippon Denso Co Manufacturing method for a field effect semiconductor device.

Also Published As

Publication number Publication date
KR900000064B1 (ko) 1990-01-19
US4735824A (en) 1988-04-05
DE3618128C2 (https=) 1992-07-02
KR860009494A (ko) 1986-12-23

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)