DE3587387D1 - Speicherschnittstellenschaltung. - Google Patents
Speicherschnittstellenschaltung.Info
- Publication number
- DE3587387D1 DE3587387D1 DE8585103569T DE3587387T DE3587387D1 DE 3587387 D1 DE3587387 D1 DE 3587387D1 DE 8585103569 T DE8585103569 T DE 8585103569T DE 3587387 T DE3587387 T DE 3587387T DE 3587387 D1 DE3587387 D1 DE 3587387D1
- Authority
- DE
- Germany
- Prior art keywords
- interface circuit
- memory interface
- memory
- circuit
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6827384A JPS60211555A (ja) | 1984-04-04 | 1984-04-04 | メモリインタフエ−ス回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3587387D1 true DE3587387D1 (de) | 1993-07-15 |
DE3587387T2 DE3587387T2 (de) | 1993-11-18 |
Family
ID=13368981
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19853587387 Expired - Fee Related DE3587387T2 (de) | 1984-04-04 | 1985-03-26 | Speicherschnittstellenschaltung. |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0157341B1 (de) |
JP (1) | JPS60211555A (de) |
DE (1) | DE3587387T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63647A (ja) * | 1986-06-19 | 1988-01-05 | Fujitsu Ltd | メモリ領域切換回路 |
JPS63257859A (ja) * | 1987-04-15 | 1988-10-25 | Matsushita Electric Ind Co Ltd | メモリ制御装置 |
US5036495A (en) * | 1989-12-28 | 1991-07-30 | International Business Machines Corp. | Multiple mode-set for IC chip |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4475176A (en) * | 1981-08-06 | 1984-10-02 | Tokyo Shibaura Denki Kabushiki Kaisha | Memory control system |
JPS5952483A (ja) * | 1982-09-17 | 1984-03-27 | Fujitsu Ltd | 主記憶装置 |
-
1984
- 1984-04-04 JP JP6827384A patent/JPS60211555A/ja active Pending
-
1985
- 1985-03-26 DE DE19853587387 patent/DE3587387T2/de not_active Expired - Fee Related
- 1985-03-26 EP EP19850103569 patent/EP0157341B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0157341A2 (de) | 1985-10-09 |
JPS60211555A (ja) | 1985-10-23 |
EP0157341B1 (de) | 1993-06-09 |
EP0157341A3 (en) | 1989-08-02 |
DE3587387T2 (de) | 1993-11-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |