DE3585654D1 - Trockenaetzverfahren und anordnung dafuer. - Google Patents

Trockenaetzverfahren und anordnung dafuer.

Info

Publication number
DE3585654D1
DE3585654D1 DE8585306563T DE3585654T DE3585654D1 DE 3585654 D1 DE3585654 D1 DE 3585654D1 DE 8585306563 T DE8585306563 T DE 8585306563T DE 3585654 T DE3585654 T DE 3585654T DE 3585654 D1 DE3585654 D1 DE 3585654D1
Authority
DE
Germany
Prior art keywords
drying method
arrangement therefor
therefor
arrangement
drying
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585306563T
Other languages
English (en)
Inventor
Makoto C O Patent Divis Sekine
Haruo C O Patent Divisio Okano
Yasuhiro C O Patent Di Horiike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3585654D1 publication Critical patent/DE3585654D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
DE8585306563T 1984-09-21 1985-09-16 Trockenaetzverfahren und anordnung dafuer. Expired - Lifetime DE3585654D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59197904A JPS6175529A (ja) 1984-09-21 1984-09-21 ドライエツチング方法及び装置

Publications (1)

Publication Number Publication Date
DE3585654D1 true DE3585654D1 (de) 1992-04-23

Family

ID=16382209

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585306563T Expired - Lifetime DE3585654D1 (de) 1984-09-21 1985-09-16 Trockenaetzverfahren und anordnung dafuer.

Country Status (4)

Country Link
US (1) US4668337A (de)
EP (1) EP0175561B1 (de)
JP (1) JPS6175529A (de)
DE (1) DE3585654D1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278146A (ja) * 1985-06-03 1986-12-09 Toshiba Corp 光処理方法
US6077718A (en) * 1985-07-23 2000-06-20 Canon Kabushiki Kaisha Method for forming deposited film
US5261961A (en) * 1985-07-23 1993-11-16 Canon Kabushiki Kaisha Device for forming deposited film
US5769950A (en) * 1985-07-23 1998-06-23 Canon Kabushiki Kaisha Device for forming deposited film
JP2635021B2 (ja) * 1985-09-26 1997-07-30 宣夫 御子柴 堆積膜形成法及びこれに用いる装置
US4786361A (en) * 1986-03-05 1988-11-22 Kabushiki Kaisha Toshiba Dry etching process
US4793897A (en) * 1987-03-20 1988-12-27 Applied Materials, Inc. Selective thin film etch process
US4967152A (en) * 1988-03-11 1990-10-30 Ultra-Probe Apparatus including a focused UV light source for non-contact measurement and alteration of electrical properties of conductors
US4855015A (en) * 1988-04-29 1989-08-08 Texas Instruments Incorporated Dry etch process for selectively etching non-homogeneous material bilayers
JPH0622218B2 (ja) * 1988-08-06 1994-03-23 富士通株式会社 エッチング方法
US5015330A (en) * 1989-02-28 1991-05-14 Kabushiki Kaisha Toshiba Film forming method and film forming device
GB2234631B (en) * 1989-07-27 1993-02-17 Stc Plc Selective etching of insulating materials
EP0418540A3 (en) * 1989-08-11 1991-08-07 Sanyo Electric Co., Ltd. Dry etching method
US5254215A (en) * 1989-08-11 1993-10-19 Sanyo Electric Co., Ltd. Dry etching method
US5084125A (en) * 1989-09-12 1992-01-28 Matsushita Electric Industrial Co., Ltd. Apparatus and method for producing semiconductor substrate
US5002632A (en) * 1989-11-22 1991-03-26 Texas Instruments Incorporated Method and apparatus for etching semiconductor materials
US5318662A (en) * 1989-12-20 1994-06-07 Texas Instruments Incorporated Copper etch process using halides
DE69032089T2 (de) * 1989-12-20 1998-06-25 Texas Instruments Inc Kupfer-Aetzverfahren mit Hilfe von Haliden
KR910016054A (ko) * 1990-02-23 1991-09-30 미다 가쓰시게 마이크로 전자 장치용 표면 처리 장치 및 그 방법
EP0706088A1 (de) * 1990-05-09 1996-04-10 Canon Kabushiki Kaisha Fotomaske zum Ätzen von Mustern
JPH0464234A (ja) * 1990-07-04 1992-02-28 Mitsubishi Electric Corp 配線パターンの形成方法
US5273609A (en) * 1990-09-12 1993-12-28 Texas Instruments Incorporated Method and apparatus for time-division plasma chopping in a multi-channel plasma processing equipment
FR2675309A1 (fr) * 1991-03-22 1992-10-16 Siemens Ag Procede pour eliminer localement des couches isolantes transparentes aux ultraviolets, situees sur un substrat semiconducteur.
DE4203804C2 (de) * 1991-03-22 1994-02-10 Siemens Ag Verfahren zur Herstellung von Kontakten auf einer mit einer UV-transparenten Isolationsschicht bedeckten leitenden Struktur in höchstintegrierten Schaltkreisen
US6146135A (en) * 1991-08-19 2000-11-14 Tadahiro Ohmi Oxide film forming method
JPH06232099A (ja) 1992-09-10 1994-08-19 Mitsubishi Electric Corp 半導体装置の製造方法，半導体装置の製造装置，半導体レーザの製造方法，量子細線構造の製造方法，及び結晶成長方法
EP0591559B1 (de) * 1992-09-28 1996-03-06 Schablonentechnik Kufstein Aktiengesellschaft Verfahren und Vorrichtung zum Gravieren von Rundschablonen
JPH1180975A (ja) * 1997-09-04 1999-03-26 Speedfam Co Ltd プラズマエッチング装置の耐食システム及びその方法
JP3322181B2 (ja) * 1997-09-17 2002-09-09 インターナショナル・ビジネス・マシーンズ・コーポレーション ドライエッチング方法および装置
JP2000208487A (ja) * 1999-01-11 2000-07-28 Speedfam-Ipec Co Ltd 局部エッチング装置及び局部エッチング方法
JP4169854B2 (ja) * 1999-02-12 2008-10-22 スピードファム株式会社 ウエハ平坦化方法
US6569775B1 (en) 1999-03-30 2003-05-27 Applied Materials, Inc. Method for enhancing plasma processing performance
JP3664033B2 (ja) * 2000-03-29 2005-06-22 セイコーエプソン株式会社 セラミックスの製造方法およびその製造装置
US20090155487A1 (en) * 2007-12-13 2009-06-18 International Business Machines Corporation Ultraviolet uv photo processing or curing of thin films with surface treatment
JP5710645B2 (ja) * 2010-12-17 2015-04-30 タツモ株式会社 パターニング方法
US9859127B1 (en) * 2016-06-10 2018-01-02 Lam Research Corporation Line edge roughness improvement with photon-assisted plasma process

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4123663A (en) * 1975-01-22 1978-10-31 Tokyo Shibaura Electric Co., Ltd. Gas-etching device
JPS52127765A (en) * 1976-04-19 1977-10-26 Fujitsu Ltd Plasma etching method
US4183780A (en) * 1978-08-21 1980-01-15 International Business Machines Corporation Photon enhanced reactive ion etching
JPS55113329A (en) * 1979-02-23 1980-09-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Light dry etching
JPS5933830A (ja) * 1982-08-20 1984-02-23 Toshiba Corp ドライエツチング方法
JPS59207631A (ja) * 1983-05-11 1984-11-24 Semiconductor Res Found 光化学を用いたドライプロセス装置
JPH0622212B2 (ja) * 1983-05-31 1994-03-23 株式会社東芝 ドライエッチング方法

Also Published As

Publication number Publication date
EP0175561A2 (de) 1986-03-26
EP0175561B1 (de) 1992-03-18
EP0175561A3 (en) 1988-04-27
US4668337A (en) 1987-05-26
JPS6175529A (ja) 1986-04-17

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