DE3580417D1 - Thermisches ausgluehen integrierter schaltungen. - Google Patents

Thermisches ausgluehen integrierter schaltungen.

Info

Publication number
DE3580417D1
DE3580417D1 DE8585107740T DE3580417T DE3580417D1 DE 3580417 D1 DE3580417 D1 DE 3580417D1 DE 8585107740 T DE8585107740 T DE 8585107740T DE 3580417 T DE3580417 T DE 3580417T DE 3580417 D1 DE3580417 D1 DE 3580417D1
Authority
DE
Germany
Prior art keywords
glowing
thermal
integrated circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585107740T
Other languages
German (de)
English (en)
Inventor
Zeev Avraham Weinberg
Donald Reeder Young
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3580417D1 publication Critical patent/DE3580417D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/0134—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01344—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a nitrogen-containing ambient, e.g. N2O oxidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H10P34/422—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing using incoherent radiation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/004—Annealing, incoherent light
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/91—Controlling charging state at semiconductor-insulator interface
DE8585107740T 1984-07-30 1985-06-24 Thermisches ausgluehen integrierter schaltungen. Expired - Lifetime DE3580417D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/635,391 US4585492A (en) 1984-07-30 1984-07-30 Rapid thermal annealing of silicon dioxide for reduced hole trapping

Publications (1)

Publication Number Publication Date
DE3580417D1 true DE3580417D1 (de) 1990-12-13

Family

ID=24547617

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585107740T Expired - Lifetime DE3580417D1 (de) 1984-07-30 1985-06-24 Thermisches ausgluehen integrierter schaltungen.

Country Status (4)

Country Link
US (1) US4585492A (enExample)
EP (1) EP0170848B1 (enExample)
JP (1) JPS6142145A (enExample)
DE (1) DE3580417D1 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4661177A (en) * 1985-10-08 1987-04-28 Varian Associates, Inc. Method for doping semiconductor wafers by rapid thermal processing of solid planar diffusion sources
US4814291A (en) * 1986-02-25 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making devices having thin dielectric layers
US4784975A (en) * 1986-10-23 1988-11-15 International Business Machines Corporation Post-oxidation anneal of silicon dioxide
US4933022A (en) * 1988-11-14 1990-06-12 Board Of Trustees Of The Leland Stanford Univ. & Electric Power Research Institute Solar cell having interdigitated contacts and internal bypass diodes
US4927770A (en) * 1988-11-14 1990-05-22 Electric Power Research Inst. Corp. Of District Of Columbia Method of fabricating back surface point contact solar cells
US4933021A (en) * 1988-11-14 1990-06-12 Electric Power Research Institute Monolithic series-connected solar cells employing shorted p-n junctions for electrical isolation
US4962065A (en) * 1989-02-13 1990-10-09 The University Of Arkansas Annealing process to stabilize PECVD silicon nitride for application as the gate dielectric in MOS devices
US5264724A (en) * 1989-02-13 1993-11-23 The University Of Arkansas Silicon nitride for application as the gate dielectric in MOS devices
EP0459763B1 (en) * 1990-05-29 1997-05-02 Semiconductor Energy Laboratory Co., Ltd. Thin-film transistors
CN1244891C (zh) * 1992-08-27 2006-03-08 株式会社半导体能源研究所 有源矩阵显示器
JPH0766420A (ja) * 1993-08-31 1995-03-10 Matsushita Electric Ind Co Ltd 薄膜の加工方法
JP3518122B2 (ja) * 1996-01-12 2004-04-12 ソニー株式会社 半導体装置の製造方法
US5904575A (en) * 1997-02-14 1999-05-18 Advanced Micro Devices, Inc. Method and apparatus incorporating nitrogen selectively for differential oxide growth
TW388095B (en) * 1997-05-20 2000-04-21 United Microelectronics Corp Method for improving planarization of dielectric layer in interconnect metal process
JP3754234B2 (ja) 1998-04-28 2006-03-08 インターナショナル・ビジネス・マシーンズ・コーポレーション ゲート構造側壁の酸化膜の形成方法
CN100442454C (zh) * 2000-09-19 2008-12-10 马特森技术公司 形成介电薄膜的方法
GB2370043A (en) * 2000-12-12 2002-06-19 Mitel Corp Chemical treatment of silica films
SG110043A1 (en) * 2003-05-07 2005-04-28 Systems On Silicon Mfg Co Pte Rapid thermal annealing of silicon structures
US7632729B2 (en) * 2006-09-27 2009-12-15 Taiwan Semiconductor Manufacturing Co., Ltd. Method for semiconductor device performance enhancement
US8693553B2 (en) * 2007-12-28 2014-04-08 Nokia Corporation Methods, apparatuses, and computer program products for adaptive synchronized decoding of digital video

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE674294A (enExample) * 1964-12-28
US3615873A (en) * 1969-06-03 1971-10-26 Sprague Electric Co Method of stabilizing mos devices
US4431900A (en) * 1982-01-15 1984-02-14 Fairchild Camera & Instrument Corporation Laser induced flow Ge-O based materials

Also Published As

Publication number Publication date
JPS6142145A (ja) 1986-02-28
US4585492A (en) 1986-04-29
EP0170848A3 (en) 1987-07-01
JPH0263294B2 (enExample) 1990-12-27
EP0170848B1 (en) 1990-11-07
EP0170848A2 (en) 1986-02-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee