DE3480308D1 - Process for fabricating a semiconductor device including a barrier film - Google Patents

Process for fabricating a semiconductor device including a barrier film

Info

Publication number
DE3480308D1
DE3480308D1 DE8484305924T DE3480308T DE3480308D1 DE 3480308 D1 DE3480308 D1 DE 3480308D1 DE 8484305924 T DE8484305924 T DE 8484305924T DE 3480308 T DE3480308 T DE 3480308T DE 3480308 D1 DE3480308 D1 DE 3480308D1
Authority
DE
Germany
Prior art keywords
fabricating
semiconductor device
device including
barrier film
barrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8484305924T
Other languages
English (en)
Inventor
Kazunari Shirai
Hajime Kamioka
Shigeyoshi Koike
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=15695910&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3480308(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3480308D1 publication Critical patent/DE3480308D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/019—Contacts of silicides
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/09—Laser anneal

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE8484305924T 1983-08-31 1984-08-30 Process for fabricating a semiconductor device including a barrier film Expired DE3480308D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58159536A JPS6063926A (ja) 1983-08-31 1983-08-31 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE3480308D1 true DE3480308D1 (en) 1989-11-30

Family

ID=15695910

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484305924T Expired DE3480308D1 (en) 1983-08-31 1984-08-30 Process for fabricating a semiconductor device including a barrier film

Country Status (5)

Country Link
US (1) US4672740A (de)
EP (1) EP0137701B1 (de)
JP (1) JPS6063926A (de)
KR (1) KR890003144B1 (de)
DE (1) DE3480308D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0715990B2 (ja) * 1985-09-11 1995-02-22 三菱電機株式会社 半導体装置
JPS63205930A (ja) * 1987-02-21 1988-08-25 Ricoh Co Ltd 半導体集積回路装置の製造方法
GB2204066A (en) * 1987-04-06 1988-11-02 Philips Electronic Associated A method for manufacturing a semiconductor device having a layered structure
US5293059A (en) * 1987-09-07 1994-03-08 Oki Electric Industry Co., Ltd. MOS semiconductor device with double-layer gate electrode structure
US5229311A (en) * 1989-03-22 1993-07-20 Intel Corporation Method of reducing hot-electron degradation in semiconductor devices
US6242811B1 (en) 1989-11-30 2001-06-05 Stmicroelectronics, Inc. Interlevel contact including aluminum-refractory metal alloy formed during aluminum deposition at an elevated temperature
US5658828A (en) 1989-11-30 1997-08-19 Sgs-Thomson Microelectronics, Inc. Method for forming an aluminum contact through an insulating layer
DE69031903T2 (de) 1989-11-30 1998-04-16 Sgs Thomson Microelectronics Verfahren zum Herstellen von Zwischenschicht-Kontakten
US6271137B1 (en) 1989-11-30 2001-08-07 Stmicroelectronics, Inc. Method of producing an aluminum stacked contact/via for multilayer
US5108951A (en) * 1990-11-05 1992-04-28 Sgs-Thomson Microelectronics, Inc. Method for forming a metal contact
US5472912A (en) * 1989-11-30 1995-12-05 Sgs-Thomson Microelectronics, Inc. Method of making an integrated circuit structure by using a non-conductive plug
US4975386A (en) * 1989-12-22 1990-12-04 Micro Power Systems, Inc. Process enhancement using molybdenum plugs in fabricating integrated circuits
US5213999A (en) * 1990-09-04 1993-05-25 Delco Electronics Corporation Method of metal filled trench buried contacts
US6287963B1 (en) 1990-11-05 2001-09-11 Stmicroelectronics, Inc. Method for forming a metal contact
KR920010620A (ko) * 1990-11-30 1992-06-26 원본미기재 다층 상호접속선을 위한 알루미늄 적층 접점/통로 형성방법
JPH05347272A (ja) * 1991-01-26 1993-12-27 Sharp Corp 半導体装置の製造方法
US5187114A (en) * 1991-06-03 1993-02-16 Sgs-Thomson Microelectronics, Inc. Method of making SRAM cell and structure with polycrystalline P-channel load devices
TW520072U (en) * 1991-07-08 2003-02-01 Samsung Electronics Co Ltd A semiconductor device having a multi-layer metal contact
DE69319993T2 (de) * 1992-09-22 1998-12-10 Sgs Thomson Microelectronics Methode zur Herstellung eines Metallkontaktes
US6849557B1 (en) * 1997-04-30 2005-02-01 Micron Technology, Inc. Undoped silicon dioxide as etch stop for selective etch of doped silicon dioxide
US7015422B2 (en) * 2000-12-21 2006-03-21 Mattson Technology, Inc. System and process for heating semiconductor wafers by optimizing absorption of electromagnetic energy
US6970644B2 (en) * 2000-12-21 2005-11-29 Mattson Technology, Inc. Heating configuration for use in thermal processing chambers
US6989108B2 (en) * 2001-08-30 2006-01-24 Micron Technology, Inc. Etchant gas composition
US20050104072A1 (en) * 2003-08-14 2005-05-19 Slater David B.Jr. Localized annealing of metal-silicon carbide ohmic contacts and devices so formed
US7956672B2 (en) * 2004-03-30 2011-06-07 Ricoh Company, Ltd. Reference voltage generating circuit
US7851343B2 (en) * 2007-06-14 2010-12-14 Cree, Inc. Methods of forming ohmic layers through ablation capping layers

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4141022A (en) * 1977-09-12 1979-02-20 Signetics Corporation Refractory metal contacts for IGFETS
JPS5669844A (en) * 1979-11-10 1981-06-11 Toshiba Corp Manufacture of semiconductor device
EP0054259B1 (de) * 1980-12-12 1986-08-06 Kabushiki Kaisha Toshiba Verfahren zur Herstellung einer Halbleiteranordnung vom MIS-Typ
US4392299A (en) * 1981-01-08 1983-07-12 Rca Corporation Method of manufacturing low resistance gates and interconnections
JPS57124430A (en) * 1981-01-23 1982-08-03 Sony Corp Manufacture of semiconductor device
JPS584924A (ja) * 1981-07-01 1983-01-12 Hitachi Ltd 半導体装置の電極形成方法
US4389257A (en) * 1981-07-30 1983-06-21 International Business Machines Corporation Fabrication method for high conductivity, void-free polysilicon-silicide integrated circuit electrodes
GB2114809B (en) * 1982-02-04 1986-02-05 Standard Telephones Cables Ltd Metallic silicide production
DE3211761A1 (de) * 1982-03-30 1983-10-06 Siemens Ag Verfahren zum herstellen von integrierten mos-feldeffekttransistorschaltungen in siliziumgate-technologie mit silizid beschichteten diffusionsgebieten als niederohmige leiterbahnen
US4485550A (en) * 1982-07-23 1984-12-04 At&T Bell Laboratories Fabrication of schottky-barrier MOS FETs
JPS59100520A (ja) * 1982-11-30 1984-06-09 Fujitsu Ltd 半導体装置の製造方法
DE3304588A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mos-transistoren mit flachen source/drain-gebieten, kurzen kanallaengen und einer selbstjustierten, aus einem metallsilizid bestehenden kontaktierungsebene
US4569122A (en) * 1983-03-09 1986-02-11 Advanced Micro Devices, Inc. Method of forming a low resistance quasi-buried contact
JPS59210642A (ja) * 1983-05-16 1984-11-29 Hitachi Ltd 半導体装置の製造方法
JPS61145A (ja) * 1984-06-05 1986-01-06 太田　良三 組立容器
JPS63819A (ja) * 1986-06-19 1988-01-05 Global Mach Kk ディスク状記録媒体の表面保護膜形成装置

Also Published As

Publication number Publication date
EP0137701B1 (de) 1989-10-25
KR890003144B1 (ko) 1989-08-23
US4672740A (en) 1987-06-16
KR850002172A (ko) 1985-05-06
JPS6063926A (ja) 1985-04-12
EP0137701A1 (de) 1985-04-17

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8331 Complete revocation