DE3428259A1 - Keramische vielschichtverdrahtungsplatte - Google Patents

Keramische vielschichtverdrahtungsplatte

Info

Publication number
DE3428259A1
DE3428259A1 DE3428259A DE3428259A DE3428259A1 DE 3428259 A1 DE3428259 A1 DE 3428259A1 DE 3428259 A DE3428259 A DE 3428259A DE 3428259 A DE3428259 A DE 3428259A DE 3428259 A1 DE3428259 A1 DE 3428259A1
Authority
DE
Germany
Prior art keywords
wiring board
holes
ceramic
hole
diameter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE3428259A
Other languages
German (de)
English (en)
Other versions
DE3428259C2 (enExample
Inventor
Shosaku Kamakura Ishihara
Takashi Yokohama Kuroki
Tatsuji Ibaraki Sakamoto
Gyozo Hino Toda
Akio Shimoinayoshi Ibaraki Yasukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE3428259A1 publication Critical patent/DE3428259A1/de
Application granted granted Critical
Publication of DE3428259C2 publication Critical patent/DE3428259C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845—Stepped hole, via, edge, bump or conductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE3428259A 1983-08-25 1984-07-31 Keramische vielschichtverdrahtungsplatte Granted DE3428259A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58154052A JPS6047495A (ja) 1983-08-25 1983-08-25 セラミツク配線基板

Publications (2)

Publication Number Publication Date
DE3428259A1 true DE3428259A1 (de) 1985-03-14
DE3428259C2 DE3428259C2 (enExample) 1987-11-19

Family

ID=15575857

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3428259A Granted DE3428259A1 (de) 1983-08-25 1984-07-31 Keramische vielschichtverdrahtungsplatte

Country Status (3)

Country Link
US (1) US4604496A (enExample)
JP (1) JPS6047495A (enExample)
DE (1) DE3428259A1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH067578B2 (ja) * 1985-01-28 1994-01-26 日本電気株式会社 セラミツク多層基板
JPH0714105B2 (ja) * 1986-05-19 1995-02-15 日本電装株式会社 混成集積回路基板及びその製造方法
DE3786600T2 (de) * 1986-05-30 1993-11-04 Furukawa Electric Co Ltd Mehrschichtige gedruckte schaltung und verfahren zu ihrer herstellung.
JPS63156393A (ja) * 1986-12-19 1988-06-29 松下電器産業株式会社 セラミツク多層回路基板の製造方法
US5212352A (en) * 1987-07-31 1993-05-18 Texas Instruments Incorporated Self-aligned tungsten-filled via
US5084323A (en) * 1989-04-07 1992-01-28 Nippondenso Co., Ltd. Ceramic multi-layer wiring substrate and process for preparation thereof
JP2566868B2 (ja) * 1992-05-28 1996-12-25 ニッコー株式会社 スルーホールを内包する多層セラミック配線基板およびその製造方法
JP2522180B2 (ja) * 1993-09-09 1996-08-07 日本電気株式会社 セラミック多層配線基板
US6192581B1 (en) * 1996-04-30 2001-02-27 Matsushita Electric Industrial Co., Ltd. Method of making printed circuit board
JP2002216937A (ja) * 2001-01-19 2002-08-02 Citizen Watch Co Ltd セラミックヒータの製造方法
US6987316B2 (en) * 2004-01-14 2006-01-17 International Business Machines Corporation Multilayer ceramic substrate with single via anchored pad and method of forming
JP4826253B2 (ja) * 2005-12-30 2011-11-30 株式会社村田製作所 セラミック多層基板の製造方法およびセラミック多層基板
RU2610302C2 (ru) * 2015-07-07 2017-02-09 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Марийский государственный университет" Способ формирования межслойных переходов в многослойной металлокерамической плате

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2558361A1 (de) * 1974-12-31 1976-07-08 Ibm Verfahren zum herstellen von durchgehend metallisierten bohrungen in mehrschichtigen keramischen moduln
US4237606A (en) * 1976-08-13 1980-12-09 Fujitsu Limited Method of manufacturing multilayer ceramic board
US4345955A (en) * 1980-10-28 1982-08-24 E. I. Du Pont De Nemours And Company Process for manufacturing multilayer ceramic chip carrier modules
EP0062763A2 (en) * 1981-04-10 1982-10-20 International Business Machines Corporation Pinned ceramic substrate and method of making such

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3250848A (en) * 1963-09-11 1966-05-10 Rca Corp Connections in multilayer circuits and method of making same
US3561110A (en) * 1967-08-31 1971-02-09 Ibm Method of making connections and conductive paths
JPS53147968A (en) * 1977-05-30 1978-12-23 Hitachi Ltd Thick film circuit board
US4211603A (en) * 1978-05-01 1980-07-08 Tektronix, Inc. Multilayer circuit board construction and method
JPS5512756A (en) * 1978-07-13 1980-01-29 Nec Corp Semiconductor device manufacturing method
JPS55156395A (en) * 1979-05-24 1980-12-05 Fujitsu Ltd Method of fabricating hollow multilayer printed board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2558361A1 (de) * 1974-12-31 1976-07-08 Ibm Verfahren zum herstellen von durchgehend metallisierten bohrungen in mehrschichtigen keramischen moduln
US4237606A (en) * 1976-08-13 1980-12-09 Fujitsu Limited Method of manufacturing multilayer ceramic board
US4345955A (en) * 1980-10-28 1982-08-24 E. I. Du Pont De Nemours And Company Process for manufacturing multilayer ceramic chip carrier modules
EP0062763A2 (en) * 1981-04-10 1982-10-20 International Business Machines Corporation Pinned ceramic substrate and method of making such

Also Published As

Publication number Publication date
JPH025315B2 (enExample) 1990-02-01
DE3428259C2 (enExample) 1987-11-19
US4604496A (en) 1986-08-05
JPS6047495A (ja) 1985-03-14

Similar Documents

Publication Publication Date Title
DE3485930T2 (de) Mehrschichtiges keramisches substrat und verfahren zum herstellen desselben.
DE19628680C2 (de) Verfahren zum Herstellen eines mehrschichtigen Keramiksubstrats
DE2736055C3 (de) Mehrschichtige gedruckte Schaltung und Verfahren zum Herstellen der mehrschichtigen gedruckten Schaltung
DE2703956C2 (de) Verfahren zur Herstellung einer Mehrschichtkeramik
DE69733714T2 (de) Verfahren zur kontrolle der kavitätabmessungen gebrannter vielschichtschaltungsplatinen auf einem träger
DE69305939T2 (de) Verfahren zur Herstellung eines keramischen Schaltungssubstrates
DE69931846T2 (de) Herstellungsmethode eines Mehrlagensubstrates
DE60021848T2 (de) Keramisches heizgerät
DE68923468T2 (de) Verfahren zur Herstellung von Mehrschichtschaltungen.
DE3851548T2 (de) Keramisches Mehrschichtsubstrat und Verfahren zu seiner Herstellung.
DE3738343A1 (de) Schaltkreissubstrat
DE19904727B4 (de) Widerstandselemente und Verfahren zum Herstellen derselben
DE3223736C2 (de) Keramisches Dielektrikum
DE1903819A1 (de) Aus Keramik und Metall zusammengesetztes Verbundgebilde
DE4118466A1 (de) Temperatursensor
DE3428259C2 (enExample)
DE10253682A1 (de) Verfahren zur Herstellung eines Mehrlagen-Keramiksubstrats
DE69309358T2 (de) Verfahren zur Herstellung eines Schaltungssubstrats
DE10033984A1 (de) Hybridlaminat und Verfahren zur Herstellung desselben
DE3917136C2 (enExample)
DE19707253C2 (de) Keramische Mehrlagenleiterplatte in LTCC-Technik mit verbesserter Beständigkeit der Ag-Au-Verbindung
DE3428559A1 (de) Flexible, glasbeschichtete substrate sowie verfahren zu ihrer herstellung
DE3148809C2 (de) Keramische Trägerplatte für feinlinige elektrische Schaltungen und Verfahren zu deren Herstellung
DE2548019A1 (de) Keramisches heizelement
DE10204429B4 (de) Elektronische Komponente und Herstellungsverfahren dafür

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee