DE3345449A1 - SOLID AC VOLTAGE RELAY - Google Patents

Description

Patent attorneys

European Patent Representatives European Patent Attorneys DipT-lri'g. 'Curt Wallach Dipl.-Ing. Günther Koch Dipl.-Phys. Dr Tino Haibach Dipl.-Ing. Rainer Feldkamp

D-8000 Munich 2 · Kaufingerstraße 8 ■ Telephone (0 89) 2 60 80 78 · Telex 5 29 513 wakai d

Date:

Our sign:

17 833 - F / r

APPLICANT:

INTERNATIONAL RECTIFIER CORP 9220 Sunset Boulevard Los Angeles, California United States

OBJECT Solid state AC voltage relay is

PRIORITY:

December 21, 1982
US S / N 451,792
United States

November 25, 1983
United States

BAD.QRiGJfsJAL "'COPY

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The invention relates to a solid state AC voltage relay and a new type of thyristor used in such a solid-state AC voltage relay is usable.

Solid state AC voltage relays are well known. Relays with optical isolation between their input and Output are also well known. Known components of this type typically have many discrete components required to complete the AC circuit. So, thirty or more discrete thyristors, transistors, resistors, and capacitors may be required to produce a single component. Tried the different parts of the whole Integrate solid-state AC voltage relays, but this has due to the mixture of high voltage and High performance components have had limited success.

Solid-state AC voltage relays previously used continue zero-cross circuits to ensure that the thyristor only turns on

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when the AC voltage is within a certain narrow "window". These circuits were also relatively complicated and difficult to integrate into the main power semiconductor chip. Thus, zero-crossing ignition circuits required the use of a discrete resistor across the Power connections is switched on. These resistances could not be easily integrated into a single semiconductor die because it was difficult to to form this resistor on the surface of the semiconductor die.

It was still difficult to obtain so-called "bumpless" operation of the relay under any inductive conditions or to achieve drag loads. Although solid-state AC voltage relays with resistive loads or If slightly inductive loads can work well, they can tend to operate in half-wave or bounce mode transition, i.e. into a state in which the relay only switches on for one half of a period, if there were strong inductive loads. So far this has resulted from the fact that the relays generally have processing circuits to suppress rapid switching on of the circuit under certain transient states with a high value of dV / dt were provided. If the component is operated under a very strong inductive load, will Voltage jumps generally repeated during the Switching on the component generated. If the signal conditioning circuit misinterprets this as a settling signal, so it switches off the power output during a certain half-phase of operation. The circuit then appears again during the next half oscillation

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to be normal and the relay will turn on again. This state repeats itself, so that the relay only during one or the other of the half-periods of a full oscillation turns on. To avoid this condition, relays have heretofore been designed with a reduced ignition sensitivity, and this has resulted in a reduction the sensitivity to optical ignition.

Because known relays were relatively complicated, they required a considerable volume for their housing. Furthermore, solid-state AC voltage relays have hitherto been limited to a maximum temperature rise of approximately 110 ^° C., as a result of which their current loading properties have been limited. Finally, due to the need for a large number of discrete components and large housings, solid-state AC voltage relays have been relatively expensive.

Optically triggered lateral thyristor components that can be used alone or in such relays are also known. However, such components are expensive and have a relatively large discharge voltage drop and they are relatively insensitive to input radiation. A thyristor component of this type is described, for example, in US Pat. No. 4,355,520.

The invention is based on the object of a solid-state AC voltage relay of the type mentioned at the beginning or a thyristor for use in such a solid-state alternating voltage relay to create that or the improved operating characteristics with a simple structure

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having.

This object is achieved by the invention specified in claims 1 and 14, respectively.

Advantageous refinements and developments of the invention result from the respective subclaims.

The solid state AC voltage relay according to the invention uses two identical novel thyristor power semiconductor chips, both of which have a lateral construction with the cathode and anode electrodes are located on a surface of each component and wherein each semiconductor die is optically ignitable and one has optically sensitive upper surface which, when illuminated, puts the component in a conductive state between the anode and cathode electrodes.

The Gate Circuit Each of the thyristors has a novel Control circuit connected, which is constructed either from discrete components or from components that are formed in the main part of the semiconductor material that forms the thyristor. The control circuit can prevent switching on even when the surface is illuminated if the voltage is applied across the component exceeds a value greater than any predetermined window value, or if a high value of dV / dt having voltage jumps or pulses along the Component occur. This control circuit includes a clamp transistor that can be turned on to to clamp the gate of the associated thyristor, using a capacitive voltage divider along the main power

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IO

electrodes is switched on. The capacitive voltage divider supplies a control signal to the control transistor.

One of the capacitors of the capacitive voltage divider closes the distributed capacitance of the control transistor a. As long as the control transistor is switched on, the associated power thyristor cannot switch on, even when its surface is illuminated. The capacitive voltage divider is designed so that the control transistor is normally switched on for all absolute voltages along the main component that are greater than are some relatively small window value. This allows the power thyristor outside this small window value or the zero crossing value do not switch on.

The new capacitive voltage divider works together with the control transistor in such a way that both fast Voltage jumps or pulses are suppressed as well an operation of the component is made possible in the normal load condition. This eliminates voltage jumps or glitches, which is generated repeatedly when the component is switched on under conditions with highly inductive loads are not misinterpreted as rapid voltage jumps and the power thyristor die can turn on normally even with highly inductive loads.

The novel signal processing of the solid-state AC voltage relay according to the invention also allows a considerable increase of the optical sensitivity of the component without the risk of j e ⁿ hl zündunger. It should be noted that currently available optically

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isolated triac drivers and the like always either in terms of their dV / dt properties or in terms of their optical sensitivity are limited because they are unable to use a low voltage level showing signals of voltage jumps and transient processes to distinguish.

The arrangement comprising two semiconductor chips is arranged in a novel housing in which the two Semiconductor wafers are easily and inexpensively connected in parallel with one another and against the external environment are protected. An alumina substrate or any other suitable thermally conductive but electrical one insulating substrate is provided with suitable conductive patterns or traces, which the various Pick up semiconductor wafers of the switch and the electrodes of the semiconductor wafers with suitable output leads associate. The two identical thyristor wafers that are anti-parallel connected to each other are symmetrically attached to respective conductive pads on the substrate and connected to each other and aligned with the terminal ends of two conductive traces on the substrate. There are two continuous wires connected by a tack connection to the thyristor pads and the conductive traces in such a way that a lead wire electrically to the anode pad of one semiconductor die, the cathode pad of the second semiconductor die and one of the conductor tracks is connected, which is connected to an AC voltage input line is. The other wire is similarly connected to the other electrodes and the other conductive path, to switch the thyristors anti-parallel.

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A small light emitting diode semiconductor die is also bonded to the aluminum oxide substrate at the same time as the power dies are connected to it. The light emitting diode is suitably connected to two input lines, those from the AC output lines are well insulated.

A plastic cap covered by a white reflective material is then attached over the substrate and covers the area of the substrate, the light emitting diode and the two power semiconductor chips contains. The cap can be made of a transparent silicone material that covers the surfaces of the semiconductor die and enclosing and encapsulating their interconnects, that material being one with white silicone has painted outer surface.

If the control circuit of the power transistor is designed in a discrete form, the discrete Components are also connected to this substrate in a suitable manner. However, these components are preferred integrated into the individual power semiconductor chips, so that the entire solid-state V / echselvoltage relay from two power semiconductor wafers and their controls, the light-emitting diode semiconductor wafers and the various support structures, such as they were described above.

Each thyristor of the relay has a novel structure and is formed in a single semiconductor die, that has a low forward voltage drop and

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has a relatively high operating current and is extremely sensitive to input radiation, see above that a non-critical light-emitting diode trigger signal source can be provided that the thyristor in the conductive State brings. The relay control circuit components including control MOSFETs connected in parallel, a resistor, a zener diode and a capacitor can also be formed in the single die will. The relay control circuit components allow the thyristor to be turned on only when when the anode-cathode voltage is less than a predetermined value. Furthermore, a faulty switch-on due to voltage jumps under all circuit conditions prevented when the light-emitting diode is switched off.

According to the invention, a large number of individual lateral transistors, each of which can be optically ignited, are shown in FIG connected in parallel to a single semiconductor die. Each lateral thyristor has a respective base, are formed in the emitter elements. A novel anode area made up of a multitude of spaced apart Anode area fingers encasing the end and two sides of each oasis make a parallel connection of the elements easily possible.

The thyristor base region includes spaced parallel emitter regions and the base region is one of one Auxiliary area surrounded by P-type conductivity. An auxiliary area for a lateral optically fired thyristor is shown in US Pat. No. 4,355,320. The new auxiliary areas according to the invention, however, are loop-shaped

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Laying around and enclosing the individual base areas these complete, and they are via a resistive connection to a conductive polysilicon field plate connected, which is firmly connected to the metallic cathode electrode.

The novel resistive connection can be achieved by spaced apart connections from the field plate to the auxiliary area. By using a resistive Connection in this way can reach more carriers, which are injected from the anode area and which move laterally move towards the emitter, this emitter. This reduces the forward voltage drop of the component improved by a considerable amount (for example from 1.45 V to 1.15 V), reducing the power dissipation in the Operation of the component is significantly reduced.

According to a further feature of the invention, the anode area, compared with the emitter doping, be relatively heavily doped to reduce the voltage drop further decrease. The emitter doping concentration on the surface of the emitter region becomes also controlled to a point that is considered optimal in terms of improving the injection efficiency was established. In particular, good operation was achieved when there was a surface concentration PO PO

from 1 χ 10 ^ ^w to 6 χ 10 ^ ^υ Phos; Emitter surface was used.

20 PO

from 1 χ 10 to 6 χ 10 "phosphorus ions / cc at the

When making the surface contacts for the component are thin cables made of relatively thick aluminum

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used, do expose a maximum amount of silicon.

The invention is explained in more detail below with reference to embodiments shown in the drawing.

Show in 1 drawing:

Figure 1 is a cross-sectional view of the interface pattern an embodiment of a single lateral Thyristor,

2 is a plan view of the metallization pattern on the surface of a single semiconductor die; which uses the embodiment of the lateral thyristor,

Fig. 3 is a plan view of the silicon surface of the semiconductor plate according to FIG. 2, from which the Boundary layer raster can be recognized by the Surface of the component protruding,

Fig. 4- is an enlarged view of one of the parallel Elements or the loops of Fig. 3>

5 along a cross-sectional view according to FIG. 3 the section line 5-5 of Fig. 3?

FIG. 6 is a cross-sectional view of FIG. 4 along the Section line 6-6 according to Fig. 4,

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FIG. 7 is a cross-sectional view of FIG. 3 along the line Section line 7-7 according to Fig. 3,

8 is a cross-sectional view of the polysilicon resistor; which is shown in Fig. 3,

Fig. 9 is a circuit diagram of an embodiment of the thyristor and its control circuit as shown by the boundary layer pattern and the connections of the component according to FIGS. 2 to 8 are formed,

Fig. 10 is a circuit diagram of an embodiment of the novel AC voltage relay,

11 shows an embodiment of the attachment of the two Power thyristor plates according to FIG. 10 and a light-emitting diode on a ceramic substrate,

FIG. 12 is a side view according to FIG. 11,

FIG. 13 is a view of the assembly according to FIG. 11 with a cover cap that encompasses the light-emitting diode and encloses the power thyristor plates,

FIG. 14 is a plan view of FIG. 13.

1 is a cross-sectional view of the interface pattern and metallization of one embodiment of the semiconductor die shown for the lateral thyristor. The conductor plate with the lateral thyristor according to Fig. 1 can be any size and shape desired, and

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is a semiconductor wafer made of monocrystalline silicon.

The various boundary layers shown in FIG. 1 are formed in an N (-) layer 20. Layer 20 can have a resistivity of approximately 20 ohm-cm. Spaced P regions 21, 22 and 23 are in the upper surface of the semiconductor die 20 formed by any desired method. Another P-type area 23a which is inactive, can enclose the circumference of the area 23. The regions 21, 22, 23 and 23a can have boron-diffused regions sufficient concentration so that the sheet resistance of the P-regions is approximately 160C ohms per square on the surface of the semiconductor wafer. The areas can also, for example, by ion implantation and formed a drive-in diffusion process using a dose of 5 x 10 6 boron atoms / cm so that they are relatively lightly doped. The region 21 is preferably more heavily doped than that other P areas. Areas 21, 22, 23 and 23a can be the same depth of about 4 microns. The P conductivity type region 23 includes a N (+) - area 24, around those with lateral or lateral spacing arranged boundary layers of the lateral thyristor to complete.

The mutually facing edges of areas 21 and 25 should be as close together as possible, but still be able to maintain a selected tension lock. In the present embodiment, the locks Component preferably about 400 to 500 V and it will

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a spacing of 105 microns is used.

The region 21 is the anode region, the region 23 is the gate or base region and the region 24 is the emitter or cathode region, while the N (-) main part 20 is the main blocking region of the thyristor. ¹ Fig. 1 forms. The region 22 is of the known floating protection region type, which enables the reverse voltage between the boundary layers 21 and 23 to be increased to up to 400 to 500 V without the risk of a breakdown on the surface of the semiconductor chip.

The top surface of the semiconductor die is covered by a thin layer of silicon dioxide 30, which may, for example, have a thickness of approximately 1 micron. Polysilicon field plates 31 and 32 are formed above oxide layer 30 as shown using conventional polysilicon deposition and masking techniques. The entire upper surface of the semiconductor plate, including the polysilicon field plates and the oxide 30, is covered by a conventional vitreous silicon dioxide layer 35 doped with phosphorus. Spaced gaps 36 and 37 of known structure can be arranged on either side of the floating protection area 22 to prevent lateral polarization effects within the phosphorus-doped oxide layer 35 from reducing the field distribution on the surface of the area 20 adjacent to the floating protection area 22 disturb.

Suitable openings are in the oxide layers

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above the emitter area 24 and the anode area designed to allow contact to the various areas and field plates. Are accordingly an aluminum cathode electrode 40 and an aluminum anode electrode 4-1 on the emitter region 24 and the Anode region 21 applied in the manner shown. Wei direct openings formed in the oxide layer 35 enable a connection from the cathode 40 to the field plate 31 and from the anode 4 - 1 to the field plate 32. Both the cathode electrode 4Ό and the anode electrode 4-1 are relatively thin, for example, about 4 microns thick.

The area 23s. is preferably with the involvement of Resistors connected to the cathode 40. Correspondingly, the region 23a with the cathode 40 can, for example be connected only at spaced points along the respective circumferential areas.

The lateral thyristor according to FIG. 1 is produced by the injection of carriers from the emitter region 24 into the gate region 23 switched on. A suitable injection can be made by impinging on the top surface of the semiconductor device can be achieved with a radiation that generates carriers (defects) in the main part 20. These flaws or holes drift to region 23 and are through the emitter interface between regions 23 and 24 intercepted to serve as a basic control for switching on the semiconductor component. A suitable one Radiation source can be the schematically shown light emitting diode 4-5, which is used to illuminate the surface of the Semiconductor component is arranged.

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SO

It was found that the structure nacj Pig, I. using component can block from 400 to 500 V, ^ a Forward operation the forward voltage drop was approximately 1.15 V with a forward current of approximately 1.5 A.

The arrangement of the lateral thyristor of FIG. 1 can be in any number of desired geometries practically carried out. A particularly effective geometry is that shown in Figures 2 through 9, which are described below and show an arrangement in which a number of semiconductor components according to FIG which is connected in parallel according to FIG. 1.

Referring now to Figures 2 and 3, there is shown a plan view of a single semiconductor die comprising a single thyristor component shows the components of its control circuit. The semiconductor die according to FIGS. 2 and 3 is one of a large number of semiconductor wafers on a common semiconductor plate, which after termination be separated from each other for joint processing. The semiconductor wafer 'is in Fig. 2 after Metallization of the cathode and anode connection electrodes shown. The interface patterns on the die surface are shown in FIG. As will be explained in detail, a plurality are separate Thyristor elements connected in parallel, with novel boundary layer patterns for the anode ^ base and Eaitter areas are used (Fig. 3 and 4-), which are extend along a path, which in the following is either serpentine or intertwined Path is designated, so that the greatest possible length results, resulting in a high current capacity for the component

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allows.

In the embodiment according to FIGS. 2 and 3, this can Die 2.083 mm (82 mils) wide, 2.87 mm (113 mils) long, and a forward current rating of 1.5 A with a forward voltage drop of 1.15 V. The bisymmetrical reverse voltage of the Component can be around 500 V peak. Corresponding may be the embodiment of the thyristor semiconductor die in combination with an identical anti-parallel connected thyristor semiconductor chip in one Pestkörper relays are used to make an alternating voltage circuit which has an effective voltage of up to 280 V.

The basic metallization pattern of Figure 2 utilizes the cathode 50 shaped as shown and anode 51 · A control circuit not shown in FIG is contained in the main part of the semiconductor die. This control circuit is shown in FIG. Metallized sections 60 and 61 according to FIG. 3 form the electrodes of two respective capacitors according to FIG. 9- The capacitor 60 will be described below with reference to FIG.

The capacitors including the electrodes 60 and 61 are connected in parallel as shown in FIG. 9 and connected between the anodes of the thyristors 64a, 64b, 64c and 64d and the gates of the control MOSFETs 76, 77 , 78 and 79, respectively. The thyristors 64a, 64b, 64c and 64d are connected in parallel and have common cathodes and anodes, the cathode 50 and anode 51 in FIGS. 2 and 6

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are shown.

A 100 K resistor 70 is also formed integrally and in one piece with the semiconductor chip according to FIG. 3, formed of polysilicon and electrically between the cathodes and gates of each of the thyristors 64a, 64b, 64c and 64d is turned on. The exact structure of the resistor 70 is explained below with reference to FIG Fig. 8 explains.

Furthermore, a Zener diode 71 is additionally formed in one piece and integrally with the semiconductor wafer according to FIG. 3, 9 in series with the capacitors 60 and 61 between the anode and cathode connections and 50 of the illustrated thyristors are turned on. Furthermore, a naturally predetermined distributed capacitance 75 is shown in FIG. 9, which is parallel to the Zener diode 71 lies.

The Zener diode 71 can be in the inactive P region 82 be formed and consist of the N + region 71a shown in FIG. 3. A Zener port 71b can be directly be formed above the N + region 71a, while the other terminal can be formed by a metal contact 71c which is connected to the cathode electrode is.

A number of control MOSFETs 76, 77, 78 and 7h according to FIG. 9i, which are explained further below with reference to FIGS. 3 and 4, are also formed on the semiconductor die and act as thyristors 64a, -j4b, 64c and 64d, respectively together. Each control MOSFET is immediate

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arranged adjacent to its respective main thyristor element, so that operating delay times are limited and the symmetry of the circuit is ensured.

The circuit according to FIG. 9 is carried out in a novel manner, as shown in greater detail with reference to FIGS is explained. It should be noted that although the embodiment described here has four parallel thyristor elements 64a, 64b, 64c, and 64d are used, any desired number of elements could be used.

As can be seen from FIGS. 3 to 6, the entire integrated component is in a substrate 80 with relative high resistance N (-), which has a resistivity of approximately 20 ohm-cm.

A number of separate areas of P conductivity type is formed in the substrate 80 by any desired method. The first of these areas is the P + anode area 8Ί, which corresponds to the anode area 21 of FIG. As in Figs. 3 and 4 As shown, the anode region 81 has a main body portion from which three parallel fingers extend 81a, 81b and 81c extend. The fingers 81a and 81b are shown in more detail in Figs. A rectangular anode section frame with legs 81d, 81e and 81f surrounds the periphery of the semiconductor die as shown in FIG. The legs 81d and 81e are shown in Fig. 5 to recognize.

The second region of the P conductivity type, shown in FIGS. 3 to 8, is the "inactive" fluid region

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82 of the P conductivity type. The inactive area 82 has loop portions 82a, 82b, 82c and 82d (Fig. 3) »which include the bases of four respective thyristors, as described below, and which fulfill the task of the auxiliary ring 23a according to FIG. The loop portion 82b is shown in FIG.

Four equally spaced elongated base regions 83a, 83b, 83c and 83d of the P conductivity type (FIGS. 3, 4 and 6) are also formed in the area 80. These base regions correspond to the base region 23 according to FIG. 1. The base region 83b is enlarged in FIG Fig. 4 shown. It should be noted that the base regions 83a, 83b, 83c and 83d are almost entirely covered by the auxiliary ring loops 82a, 82b, 82c and 82d are included, respectively.

Another area of the P conductivity type is formed, which consists of a floating guard ring 84, which is shown in Figs. 3-6. The guard ring 84 follows a sinusoidal path and bisects it N (-) - Area 80 that defines the surface of the component in the Fig. 3 and 4 reached.

Each thyristor base 83a, 83b, Sf c and 83d takes two in parallel N + emitter regions 8.5a-8 ^ b, 8Ga-86b, 87a-87b and 88a-88b, respectively (Fig. 3, 4 and o). The emitter areas 6 ^ a and 86b are shown on an enlarged scale in Fig. 4 p-e.

From the foregoing it can be seen that the interface pattern of FIG. 3 provides the basis for the four

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Forms thyristor elements 64a, 64b, 64c and 64d according to FIG. 9 and enables these elements to be connected in parallel.

The thyristor element forming the thyristor 64b is shown in FIG
4 and 6 and will be described below. The thyristor base consists of the active P region 83b, which contains the parallel emitter regions 86a and 86b. The thyristor anode area consists of the
Anode region fingers 81a and 81b symmetrically connecting the
Enclose base region 83b. The main part of the thyristor consists of the N (-) region 80. The base is still there
almost entirely surrounded by the auxiliary loop portion 82b, which has the above-described benefit of increasing the collection efficiency. The novel
Interface pattern also enables the number of thyristors on the die to be connected in parallel.

In the formation of the interface pattern shown, the lateral distance between the mutually facing edges of the base regions 83a, 83b, 83c and 85d and the respectively adjacent anode fingers 81a, 81b and
8ic (and the outer anode legs 8id and 8ie) approximately 105 microns. The depth of each of the P conductivity type regions was approximately 4 microns. Each of the base regions 83a, 83b, 83c and 83d had a length of approximately
1,016 mm (40 mils) and a width of approximately 75
Micron.

During the formation of the various P-ranges, a further protective ring 90 is preferably from

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P conductivity type (Figures 2 and 5) around the circumference of the Semiconductor die formed around. The ring 90 faces from the outer periphery of the anode 8ie of the P + conductivity type a spacing of approximately 38 microns.

During the formation of the various boundary layers, as shown in FIGS. 3 and 4, N (+) source and drain regions 9ia-9ib, 92a-92b, 93a-93b and 94a-94-b for the control MOSFETs 76, 77 »78 and 79 in FIG. 9. These areas are formed in the enlarged inactive area 82 of P conductivity type. As shown in Figure U- for the case of control MOSFET 77 , a suitable gate oxide approximately 0.1 microns thick and a polysilicon gate electrode (not shown) are placed over the gap between the regions 92a and 92b arranged. An extremely thin oxide can be used for the control MOSFETs because the gate is at the potential of the node between capacitors 60 and 61 and capacitor 75. This means that the potential difference between the gate electrodes of the control MOSFETs and the cathode of the main thyristors is very low. The transistors 76 through 79 can therefore be very high gain transistors.

The source region 92a is connected to the inactive base, while the drain region 92b is electrically connected to the Thyristor base area 83b over the conductive strip (Fig. 4 and 6) is connected. The strip 95 is preferably made of metal. A similar arrangement is for each of the thyristor elements is provided, with a conductive strip connecting the base terminals 8 $ a, 83b, 83c and 83d

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• 3 * 3-4 5 4 A 9

connects to control MOSFET source electrodes 91b, 92b, 93b and 94-b, respectively. The conductive strips are then all together for example by a polysilicon connection strip connected, partially shown schematically in Fig. 4- by the dashed line 95a is.

The capacitors 60 and 61 are also formed in the inactive P-region 82, as shown in FIG. 7 for the Capacitor 60 is shown. The capacitor 60 is made by depositing a metal layer over an area of the P-type base 82 formed by the semiconductor die is isolated by having a rectangular ring 96 having a suitable radius Corners and of the N (-) material 80 the semiconductor die surface can achieve. It should be noted that the metal layer 60 is over the thermal oxide layer 97 lies to form a field plate.

As shown in FIG. 8, the resistor 70 is also formed in the inactive region 82 of the P conductivity type. According to FIG. 8, a polysilicon strip 70a is deposited over the oxide layer 97 and coated with a deposited silicon dioxide layer 98. Therefore, the resistor 70 is formed from a resistive material layer which is completely isolated from the main part of the semiconductor die by the insulating layer. The resistor is therefore an ideal resistor that is free from any parasitic interactions with other circuit components. Openings are then formed in the layer 98 and resistor connection connections 99 and 100 are made to the

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3 *

Resistance established. These connection connections are in a suitable manner with the thyristor cathode and with the Source electrodes of control MOSFETs 76, 77, 78 and 79 tied together.

The top surface of that shown in Figs The semiconductor die is further processed to achieve the desired metallization. Before metallization is a suitable thermal oxide 110 in place or it is on the surface of the component applied to a thickness of approximately 1 micron. After the usual masking and etching steps, the Metals applied in the required sequence. The top surface is then covered with a deposited oxide coating 111 coated which can be of any desired thickness.

Novel polysilicon field plates 112 and 113 are on the thermal oxide 110 deposited. It should be noted that all polysilicon strips or layers deposited in any desired sequence.

The field plate 112 is an elongated sinusoidal plate that extends above the interface between the P (+) anode region 81 and the N (-) region 80 and follow their path. The field plate 113 is the same An elongated sinusoidal plate that follows a path parallel to plate 112 and above the boundary layer between the auxiliary area 82 and the outer one N (-) - range 80.

At the time the field plates 112 and 113

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Also, an outer equipotential ring 115 (FIG. 5) can be deposited into the outer periphery of the die be arranged around. The ^ ing 115 is with bonded to substrate 80 in the usual manner.

The field plates 112 and 113 and the ring 115 can each approximately 20 microns wide. The guard ring portion 84 can be approximately 8 microns and is located midway between the opposite edges of plates 112 and 113, these edges being spaced approximately 44 microns apart. The range is similar 90 of the P conductivity type (Fig. 5) in the middle between plates 112 and 115 'the edges of which are approximately 44 microns apart.

The anode electrode 51 is then formed as shown and engages the anode region 81 of the P conductivity type, as shown in FIGS. Furthermore, the cathode electrode ^ O is formed in the manner shown in Figs.

The lateral thyristor according to FIGS. 2 to 9 is switched on by radiation from the light-emitting diode 45 (FIGS. G and 9), which is arranged to illuminate the exposed surface of the semiconductor die. Because that Semiconductor die is extremely delicate, the size is the lei. t; ung or position of the light-emitting diode 45 not critical.

Form the patterns described with reference to FIGS

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the electrical circuit of FIG. 9 and represent a Half of the solid-state relay described below. Turning on the thyristor is against an ignition is locked by brief impulses without the presence of light. The voltage sharing between the capacitors 60-61 and 75 is reached, defines a voltage window in which a switch-on is possible is. What is important here is that the capacitive voltage divider has a very low gate voltage for the Control transistors and a very low functional leakage current. The capacitors continue to yield a shield against incident light or radiation.

The novel lateral thyristor of Figures 2-8 can be fabricated by any desired method will. The component results in a maximum effective current-carrying area between the anode region 81 and the base region 83 for a given area of the semiconductor chip. The interface pattern shape is also designed to reduce the forward voltage drop reduced to the greatest possible extent while maintaining high photosensitivity so that the light emitting diode 45 is not critical.

An essential feature of the novel geometry consists in the novel auxiliary areas 82a, 32b, 82c and Sd of the P conductivity type, which loop around each base area 83a, 83b, 83c and 83d. This geometry enables all N (+) cathodes to be connected to one another. This means that the areas 82a, ^82b: 'c and

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82d and the main area 82 areas of constant potential, in which all thyristor bases are embedded. By Spreading in the area 82 at the ends of the bases, there is a large area for the metallization for the parallel connection of the areas available.

Preferably there is a resistive connection from cathode 50 to loops 82a, 82b, 82c and 82d produced, for example, by using spaced-apart punctiform connections, which are shown schematically as connection points 120 in Pig. 4-4 and extend the length of the P conductivity type loop 82b extend. The connection can also be made by a short contact strip 121 according to Pig. 4 manufactured will. By using a resistive connection between the auxiliary loops and the cathode electrode 50, as shown in Figs. 4- and 6, carriers injected from the anode regions 81a and 81b during power-up of the device become in the direction of the emitter regions 86a and 86b instead of being removed from the auxiliary regions 82a, 82b, 82c and 82d are caught. This increases the collection efficiency of the emitter and significantly reduces the Forward voltage drop of the component. For example, by making the resistive connection between the auxiliary loop regions and the cathode 50, the forward voltage drop for a forward current decreased from 1.5A from about 1.4-5V to about 1.15V. This leads to a substantial reduction the power loss during the conductive state.

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During the production and finishing of the component according to FIGS. 3 to 6, the anode region 81 and all of its segments are preferably heavily doped compared to the doping of regions 82, 83 and 8 ^ d P conductivity type. For example, the anode region 81 can be doped to a point where it has a resistivity of 50 ohms per square, compared to the 1600 ohms per square for areas 82, 83 and 84. This egt a high gain and thus establishes a high light sensitivity for the naturally resulting lateral thyristor, which is made of areas 81, 80 and 83. Furthermore, the forward voltage drop is reduced by heavier doping of the anode region of the component is reduced.

Another essential feature of the invention is the control of the doping of the emitter regions, such as of the regions 86a and 86b of FIGS. 3 and 6, such that the concentration of the N conductivity type on the surface of the component has an optimal value of

20 20

1 x 10 to 6 χ 10 phosphorus ions / ccm. This can be achieved, for example, in that phosphorus is diffused in through a thin oxide layer during the formation of the regions 86 or in that the various gas flows are dispersed during the diffusion process. By reducing the concentration of the N conductivity type at the surface of the regions 86, the injection efficiency of the component is increased, whereby the forward voltage drop is further reduced and the sensitivity of the component to being switched on by photons from the light-emitting diode ^ 5 is considerably increased.

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In Fig. 10 is a. Circuit diagram of an embodiment of a complete AC voltage relay is shown. The relay of Fig. 10 uses two identical thyristors 210 and 211 which are connected anti-parallel to each other and are switched on between two mains alternating voltage power connections 212 and 213, respectively. The schematic The illustrated thyristors 210 and 211 are each of the type shown in FIGS. 1 through 9 and have gate circuits which are shown schematically by the gate terminals 216 and 217, respectively. The thyristor semiconductor die 210 has the anode electrode pad 220 and the cathode electrode pad on its upper surface 221, while the semiconductor die 211 an identical Anode pad 222 and a cathode pad 223 (Fig. 11).

The thyristors 210 and 211 are electrically connected to one another in such a way that the anode 220 of one thyristor with the cathode 223 of the other thyristor and the Anode 222 of one thyristor is connected to the cathode 221 of the other thyristor. They are accordingly Semiconductor devices are connected to one another in the anti-parallel relationship shown in FIG.

A single light emitting diode 225 that is a common, commercially available gallium-aluminum-arsenide component with leads 226 and 227 as shown in FIG. 10, is arranged so that it can be in the manner to be described illuminates the photosensitive surfaces of the semiconductor wafers 210 and 211 to turn on the semiconductor wafers to enable, provided the other circuit conditions are suitable. Between the

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Input circuit connected to terminals 226 and 227 and the AC power circuit. the is connected to the terminals 212 and 213, good electrical insulation is formed.

Identical control circuits as described above are used to control the activation of the Thyristors 210 and 211, respectively, are provided and close respective MOSFET transistors 230 and 231, Zener diodes 232 and 233 »resistors 234 and 235 and capacitors 236 and 237 a. Capacitors 23u and 237 serve similarly like capacitors 60 and 61 according to FIG. 9 as a component of respective capacitive voltage dividers. That The second component of the capacitive voltage divider consists of the distributed capacitance 238 and 239 of the MOSFET transistors 230 or 231

The circuit components 230 to 239 could be designed as discrete components. However, these are preferred Components with the semiconductor plates that form the thyristors 210 and 211, carried out integrated, as shown in FIG 1 to 9 has been described.

The transistors 230 and 231 are to the gate electrodes 216 and 217 of thyristors 210 and 211 respectively. As long as the transistors 230 and 231 conduct or are switched on are, the illumination of the surfaces of the components 210 and 211 by the light-emitting diode 225 can be the part do not turn on. The transistors 230 and 231 turn on when their respective gate electrodes are 2 ^ 0 and 241 are suitably charged to a suitable threshold voltage V1. Guide accordingly,

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when nodes 242 and 243 reach the turn-on threshold voltage of transistors 230 and 231 reach, and if a sufficient drain-source voltage is present, remove the components and clamp the respective gate electrodes 216 and 217 of thyristors 210 and 211.

The voltage at each of nodes 242 and 243 that begins with Vq is referred to is:

^V 0 = ^V ccV ^(C 1 ^{+ C} p ⁾

In this equation, V ₀ ^ is the voltage along the line

CC

Inferences 212 and 213 »C is the capacitance of the distributed capacitors 238 or 239 and C _x . the capacitance of the capacitors 236 and 237, respectively.

From the above, it can be seen that the voltage Vq at node 242 or 243 is greater than the threshold voltage of transistors 230 and 231 when the instantaneous AC voltage between terminals 212 and 213 is more positive or negative than any particular one "Window" value. The transistors clamp accordingly 23O and 231 the thyristors 210 and 211, if these Window voltage is exceeded. This arrangement enables then a zero crossing detector circuit without the need for a resistor interposed between extends the main terminals of the component.

The novel capacitive voltage divider circuit is also used to suppress the ignition of the components and 211 due to rapidly rising pulses

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useful, such as glitches or signals with a high dV / dt value. Such high Interference pulses with a short duration place a sufficiently high voltage across the parasitic or stray capacitances 236 and 239 to turn on transistors 230 and 231, respectively and clamp the respective thyristor. Accordingly, the thyristor does not rise rapidly due to such Glitches ignited.

With relatively slowly increasing pulses, such as those caused by highly inductive loads connected to relay terminals 212 and 213 are, these pulses are not fast enough to switch on the control transistors and thus undesirable Way to clamp thyristors 210 and 211 so that single phase operation or bouncing of the Relay is avoided with highly inductive loads. It should also be noted that this is achieved without it being necessary to reduce the optical sensitivity of the component. The thyristors 210 and 211 can therefore be designed so that they have an optimal optical sensitivity for the ignition process without the risk of faulty operation due to relatively slowly increasing transient Impulses.

Another advantage of the circuit of FIG. 10 is in the construction of resistors 234- and 235 · Der Temperature coefficient of resistance is against sensitivity of the respective thyristor balanced. That is, if the resistance is the usual negative Has temperature coefficients, it be possible

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would cause the resistor to clamp the associated controlled rectifier when it is hot. By balancing the resistance temperature coefficient of the resistors 234 and 235, however, this clamping effect can be avoided.

With reference to FIGS. 11 to 14, an arrangement for receiving the semiconductor wafers 210 and 211 and of the light-emitting diode 225 according to FIG. 10 is described. 11 and 12 show a ceramic substrate carrier 260, which can consist of aluminum oxide, but also can be made of any desired electrically insulating thermally conductive material. For example the aluminum oxide board 260 may have a thickness of 0.635 mm, a length of about 22.9 mm and a width of about 6.35 tnm. A variety of trace patterns is formed on a surface of the substrate 260 including conductive lines 261 biw 267 · Each of these conductor tracks can be formed by a gold plating on the substrate, whereby the Gold plating is greater than about 0.00381 mm thick. Each of the thyristor wafers 210 and 211 are then appropriately soldered to conductive pads 265 and 264, respectively, or otherwise attached so that the printed circuit boards are in good thermal contact with the alumina substrate 260. Each of the semiconductor dies 210 and 211 may be approximately 2.08 2.95 mm, more typically for a component Size. The light-emitting diode semiconductor die 225 has one end on the conductor track pattern 262 attached.

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The semiconductor dies 210 and 211 are attached so that their anode and cathode leads are generally aligned with one another and with one end of the conductive traces 266 and 267. Similarly, a single wire 270 is conveniently used to electrically connect conductive pads 223 of thyristor 211 and 220 of thyristor 210 and the ends of conductive line 2b7. This can be achieved by means of a stitching method of a relatively simple type which, by its nature, lends itself to high speed automatic techniques. Similarly, a stitching head is simply depressed onto the wire 270 to electrically secure the wire at three spaced apart points corresponding to the location of the pads 223, 220 and the end of the conductive path 2ü7. Similarly, a second parallel wire 271 is stapled to conductive pads 222, 221 and the end of track I. " ¹ L-6. The stapled connection of wire 271 is shown in Figures 11 and 12. Each conductive Wire 270 and 271 can be aluminum wire approximately 0.15 sec in diameter.

As a result of these connections are the lei. Connection terminals 212 and 213 are connected to the thyristor components 210 and 211 in Fig. 11 in the manner shown in Fig. 10, the thyristors being connected in anti-parallel relation to each other. It should be noted that because the semiconductor dies 210 and 210 also contain their respective control circuitry, the control circuitry is also connected in place by this single key connection mechanism.

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As shown, the light emitting diode 225 is arranged over one end of the conductor track 262, which has a connection 226 is connected. The other electrode of the light emitting diode 225 is electrically connected via a wire 280 connected to one end of the conductor track 261. The wire 280, which can be a connection line of the light-emitting diode 225, is connected to the end of trace 261 in any desired manner.

The conductor track 261 is then electrically connected to the spaced-apart conductor track 263 either by a direct short circuit connection by wire 281 or connected through a resistor 282. The selection of the Short circuit wire 281 or resistor 282 depends on what is available at terminals 226 and 227 Power and on the characteristics of the light emitting diode 225. The wires 280 and 281 can use gold wires about 0.0254 mm in diameter. It can be seen that the connections 212, 213, 226 and 227 are extend from the periphery of substrate 260 to form a dual-in-line pin type semiconductor package form.

An optical cap or housing 291 is then placed over the light emitting diode 225 and the thyristors 210 and 211 and encloses the area which is indicated in FIG. 11 by the dashed line 290. This cap is shown in Figures 13 and 14 as cap 291 and may made of any desired reflective plastic material capable of withstanding the temperatures withstand that occur during operation of the component. A white colored plastic material was made

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33454A9

used. The selected plastic material can be a Be disulfo plastic. The plastic material is preferably white so that light can shine from the inner surfaces of the Cap is reflected. The cap can also be made of a suitable silicone material, such as RTV, was mixed with the titanium oxide powder. The titsnoxide powder remains in the SiIi in a definite way. on material in dispersion. This mixture can be cured in an oven at about 115 ° C for about 15 minutes will.

The cap 291 has an inclined side surface 292 above the position of the light-emitting diode 225, this inclined edge light in the direction of the area of the semiconductor plate 210 and 211 are reflected, as can be seen in FIG.

The cap 291 can be taped in place, as shown in Figure 13, or it can be formed be that it overlaps the substrate and snaps over the edge of the substrate. A clear silicone material will be then introduced into the interior of the cap 292 via the filling bores 293 and 294 of FIGS. 13 and 14 to all Semiconductor wafers 225, 210 and .11 and their connection lines encapsulate, while .iie illumination from the light-emitting diode 225 the light-sensitive surfaces of the Thyristor semiconductor die 210 and 211 can achieve.

After the cap 291 is fastened in place and with Silicone has been filled, the entire substrate 260 together with the cap 291 in an Arischlußrahne

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attached to the connections 212, 213, 226 and 227 results. The component can then be arranged completely in an extended housing, which for example formed by transfer molding or the like can be. Terminals 212, 213, 226 and extend from this semiconductor package to provide a Dual-in-line semiconductor package with a relatively small size and low volume to form. However, the component can withstand a continuous current load of 1 1/2 A or more Withstand voltages of 240 VAC.

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Claims (31)

: "*: · ': /:" ": · / -33 45U9 Patent Attorneys - '"DTpT.-Ing. Curt Wallach European patent representative Dipl.-Ing. Günther Koch European Patent Attorneys Dlpl.-Phys. Dr Tino Haibach Dipl.-Ing. Rainer Feldkamp D-8000 Munich 2 Kaufingerstraße 8 Telephone (0 89) 2 60 80 78 Telex 5 29 513 wakai d Date: Our reference: 17 833 P / Nu Claims Solid state AC voltage relays with first and second thyristors, the respective anode and cathode electrodes and having a respective gate circle, characterized in that that each thyristor (210, 211) is in a separate respective first and second semiconductor die is designed and of the type with lateral conductivity that the anode and cathode electrodes (220 to 223) of each thyristor (210, 211) on the same first surface of the first and second Semiconductor wafers are arranged that the first surface of the first and second semiconductor wafers is optically sensitive, so that the first and second semiconductor die by illuminating the one Surface can be switched on and conduct electricity so that the solid-state AC voltage relay continues a light emitting diode (225) for illuminating the first Surfaces when they are controlled, two AC voltage connections (212, 213) with which the anode and cathode electrodes (220 to 223) of the first and second thyristors in anti-parallel relationship ■ 334544a are connected to each other, two control connections (226, 227) »those of the AC voltage connections (212, 213) are isolated and with the light emitting diode (225) and first and second control circuits (23O, 240) connected to the gate circuits the first and second thyristors (210, 211) are connected and the first and second gate circuits, respectively clamp to prevent triggering of the first and second thyristors (210, 211) when the voltage between the two AC voltage connections (212, 213) exceeds a predetermined value, and which clamp the first and second gate circuits when brief pulses occur which have a value of have dV / dt which is greater than a predetermined value. 2. Solid-state AC voltage relay according to claim 1, characterized in that the first and second control circuits include first and second transistors (240, 241), respectively, that each transistor has an output circuit and a transistor control circuit which can be actuated, to switch the respective control circuit between a conductive and a non-conductive state, that first and second capacitive voltage dividers (236 to 239) are provided, that the first and second Transistor output circuits between the gate circuit and the anode electrode of the associated one of the first and second thyristors (210, 211) are switched on such that when the first or second transistor output circuit is conductive, the respective of the first or BATH ORIGINAL second thyristors cannot ignite when its first surface is illuminated, that the first and second capacitive voltage divider connected along the two AC voltage connections (212, 213) are and have respective nodes (242, 243) between the capacitors, which are connected to the control circuit of the respective Control transistor are connected in such a way that the voltage at the node of the respective transistor makes it conductive as long as the voltage between the two AC voltage connections is a predetermined value Exceeds the value in order to prevent the respective thyristors from being switched on when the AC voltage a predetermined window voltage exceeds, and that rapidly rising glitches the Turn on transistors for their duration, to turn on the thyristors by briefly, a high To prevent pulses having a value of dV / dt. 3. Solid-state AC voltage relay according to claim 2, characterized in that the first and second control circuits (230 »231) further include first and second Zener diodes (232, 233), respectively, connected between nodes (2 ^ -2, 243) of the first or second capacitive voltage divider (236 to 239) and the anode electrode of the first or second thyristor (210, 211) are turned on. 4. Solid state AC voltage relay according to claim 2 and 3, characterized in that that a first or a second resistor (234, 255) BATH ORIGINAL between the gate circuit of the first or second thyristor (210, 211) and the anode electrode of the first or second thyristor is switched on. 5. Solid-state AC voltage relay according to claim 2 and 3, characterized in that the first and second transistors (240, 241) Metal oxide semiconductor field effect transistors are and that the transistor control circuits the gate circuit of the Include transistors. 6. Solid state AC voltage relay according to claim 5? characterized in that the second capacitor (238, 239), each of the first and second capacitive voltage divider (236 to 23 ") by the distributed capacitance of the first and second, respectively Transistor (240, 241) is formed. 7 · Solid state AC voltage relay according to one of the claims 1 to 6, characterized in that an electrically insulating, thermally conductive ceramic substrate (260) for fastening the first and second semiconductor plates and the light emitting diode (225) is provided that the first and second semiconductor die and the light emitting diode on the same surface of the substrate (260) are attached and spaced apart that the optically sensitive surfaces of the first and second semiconductor plates are directed away from the substrate (260) and that the light emitting diode (225) is in a position that is a BATH ORIGINAL Illumination of the first and second semiconductor wafers by reflecting the emitted light on reflective Surfaces (292) made possible. 8. Solid-state AC voltage relay according to one of claims 1 to 7, characterized that the first surface of each semiconductor die receives an interface Surface with a first conductivity type forms that an anode region (81) from the opposite Conductivity type and a base region (83) of the opposite conductivity type in each case Surface are formed and arranged at a lateral distance from each other that an emitter area (86) of the first conductivity type formed within the base region (83) and completely in this is contained and extends in this from the surface that the anode and cathode electrodes are connected to the anode or emitter areas (81, 86) and that the anode area (81) is more heavily doped than the base region (86) in order to reduce the forward voltage drop and the photosensitivity to enlarge. 9. Solid-state AC voltage relay according to one of claims 1 to 7, characterized that the first surface of each semiconductor die receives an interface Surface of a first conductivity type forms that an anode region (81) of the opposite Conductivity type and a base region (83) of the BAD ORIGINAL of opposite conductivity type are each formed into the surface and a lateral Have a distance from one another that an emitter region (86) of the first conductivity type within the Base region (83) is formed and completely contained in this and is in this from the surface extends from that the anode and cathode electrodes are connected to the anode and emitter regions, respectively are and that the emitter region is relatively weakly doped on the surface up to one level that would be achieved by diffusion through a thin oxide layer, in order to increase the radiation sensitivity of the lateral thyristor for switching on when irradiated by the radiation devices to enlarge. 10. Solid-state AC voltage relay according to one of claims 8 and 9, characterized by a protective ring (84-) from the opposite one Conductivity type formed into the surface and between the anode and base regions (81, 83) is arranged at a distance from these, whereby the protective ring does not come into contact with the cathode and anode electrodes and electrically floats with respect to these electrodes. 11. Solid-state AC voltage relay according to one of claims 1 to 7t, characterized in that the first surface of each semiconductor wafer forms a boundary layer receiving surface of a first conductivity type, BATH ORIGINAL that an anode region (81) of the opposite conductivity type and a base region (83) of the opposite Conductivity type each formed into this surface and with a lateral distance are arranged from each other that an emitter region (86) of the first conductivity type in the Base region (83) is formed and completely contained in this and is in this from the surface extends from that the anode and cathode electrodes are connected to the anode and emitter regions, respectively and that an auxiliary region (82) of the opposite conductivity type is formed in the surface and is at a lateral distance from and surrounds the base region (83). 12. Solid-state AC voltage relay according to one of claims 8 to 11, characterized that the base portion (83) has an elongated shape and on the surface ends in that the emitter region (86) is formed at least by an elongated rectangular shape, which is contained in the base region, and that the anode region (81) has a finger-shaped pattern, whose fingers envelop the base region (83). 13 solid-state AC voltage relay according to claim 11, characterized in that devices (120, 121) having a resistive Form connection of the auxiliary region (82) with the cathode electrode are provided. BATH ORIGINAL -3 3 A b 4 4 9 14. Lateral, optically ignitable thyristor with a Semiconductor die having an interface receiving surface of a first conductivity type, an anode region of the opposite conductivity type and a base region of the opposite one Has conductivity type, which are each formed into this surface and laterally with Are spaced apart, thereby characterized in that an emitter region (24) of the first conductivity type in the Base region (23) is formed and completely contained therein and extends from the surface, that anode and cathode electrodes (41, 40) are connected to the anode and emitter regions (21, 24) are that radiation devices (45) for irradiating at least a part of the surface for Switching on the thyristor are provided and that an auxiliary area (2Yes) of the opposite conductivity type is formed in the surface, laterally spaced from the base region and surrounds it. 15. Thyristor according to claim 14, characterized that the anode region (21) is more heavily doped than the base region (23) in order to reduce the forward voltage drop and the Increase photosensitivity. 16. Thyristor laughs claim 14 or 15 »thereby characterized in that the emitter region (24) is relatively weak on the surface BATH ORIGINAL is doped and has a surface concentration, which would be achieved by diffusion through a thin oxide layer. 17 · Thyristor according to one of Claims 14 to 16, characterized in that a Guard ring (22) of opposite conductivity type formed into the surface and between the anode and base regions (21, 23) is arranged at a lateral distance, and that the protective ring (22) is out of contact with the cathode and anode electrodes and is electrical with respect to those electrodes swims. 18. Solid-state AC voltage relay according to claim 17, characterized in that the emitter region (24 ·), the base region (2J) and the guard ring (22) are relatively thin areas with parts extending over equal distances. 19. Thyristor according to claims 14 to 18, characterized by devices, which form a resistive connection between the auxiliary area and the cathode electrode. 20. Optically triggerable thyristor with a semiconductor substrate of a first conductivity type, characterized in that the Substrate (80) at least first and second parallel base regions (8Yes to 83d) of the opposite conductivity type, which extend into the surface of the substrate, that respective etnitter regions (85a, 85b to 88a, 88b) of the first conductivity type are extend into the surface of at least first and second parallel base regions (83a to 83d) and contained entirely within their respective base regions, that respective elongate Anode regions (81a to 8ie) of opposite conductivity type extend into the substrate and on opposite elongated sides of the parallel base portions (83a to 83d) with lateral spacing from these are arranged and at least over the distance of these base areas extend that an anode contact with the anode regions and a cathode contact with the emitter regions is connected, and that radiation generator devices (4-5) are provided for generating are controlled by minority carriers in the substrate, which act as a base control to the Turn on the thyristor when suitable bias voltages are applied to the anode and cathode contacts. 21. Thyristor according to claim 20, characterized that the anode areas by parallel elongated fingers (81a to 81c) are formed which extend from an enlarged area (81) of the opposite conductivity type from extending into the substrate surface and adjacent to one end of the Base areas is arranged. BATH ORIGINAL 22. Thyristor according to claim 20 or 21, characterized in that a plurality of Auxiliary areas (82a to 82d) of the opposite Conductivity type is provided, which extend into the substrate surface and loop-shaped around the respective base regions (83a to 83d) with a lateral spacing from their elongated ones Sides and at one end of these base areas are arranged, and that the auxiliary areas between the The respective base regions and the elongated anode regions assigned to the base regions are arranged are. 23 · thyristor according to claim 22, characterized in that the plurality of Auxiliary areas (82a to 82d) of an enlarged area (82) of the opposite conductivity type which is disposed adjacent one end of the base regions. 24. Thyristor according to claim 20, characterized in that the elongated Anode regions and the plurality of base regions from each other by a continuous elongated serpentine strips of the material of the first conductivity type are separated. 25 · Thyristor according to Claim 24, characterized that a guard ring (84) of the opposite conductivity type in the middle of the elongated serpentine Strip is arranged and extends the same distance and into the substrate surface. 26. Thyristor according to claim 2 ^L V or 25, dad .. rch characterized in that first and second field plates are provided which are spaced apart and are arranged above the opposite edges of the elongated serpentine strip and extend over the same length. 27 · Thyristor according to one of Claims 20 to 26, characterized in that a respective control transistor (7b to 79) provided for each of the at least first and second base regions is that each control transistor has source and drain regions arranged at a distance from one another, which extend into the surface of the substrate and laterally spaced from their respective ones Base areas are arranged that contact devices (95) are supported on the substrate and electrically connect each of the base regions to the drain region of the respective control transistor, that the drain regions of each of the control transistors are connected to the cathode contact, that respective Gate insulation layers over the substrate in the space between the source and drain regions of each of the control transistors are arranged and that gate electrode devices are arranged above each of the gate insulating layers are arranged. BATH ORIGINAL 28. Thyristor according to claim 27 »characterized in that first and second capacitors (75 »60, 71) is formed on the substrate are »connected in series between the anode and cathode contacts and a capacitive voltage divider form that the gate electrode means of the control transistors with the node between the first and second capacitors are connected so that the first and second capacitors are sized are that they are only a small fraction of the voltage between the anode and cathode contacts between the gate electrode devices and the substrate, so that the gate insulation layer can be very thin and on the order of 0.1 microns in thickness. 29. Thyristor according to claim 28, characterized in that the first capacitor (75) is formed by a distributed capacitance and that the second transistor (60, 61) consists of a capacitor boundary layer in the substrate and a capacitor electrode above the capacitor interface and that the capacitor electrode is connected to the anode contact. 30. Thyristor according to claim 29, characterized that Zener diode devices (71) are formed in the substrate and between connected to the node between the first and second capacitors and the cathode electrode are. 31. Thyristor according to one of claims 27 to; 0, characterized in that integral resistance elements (? 0) are provided along the source and drain regions of each of the Control transistors are connected that the resistance means a strip of polysilicon include deposited over a predetermined area of the substrate that a Silicon dioxide layer between the specified area of the substrate and the strip of polysilicon is arranged so that the resistor electrically isolates from parasitic currents in the substrate is that first and second terminals are from spaced points on the polysilicon strip extend and that the first terminal is connected to each of the contact means connected to the bases is connected, while the second terminal is connected to the cathode contact. COPY
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