DE3344462A1 - Verfahren zur herstellung von halbleiterbauteilen - Google Patents

Verfahren zur herstellung von halbleiterbauteilen

Info

Publication number
DE3344462A1
DE3344462A1 DE19833344462 DE3344462A DE3344462A1 DE 3344462 A1 DE3344462 A1 DE 3344462A1 DE 19833344462 DE19833344462 DE 19833344462 DE 3344462 A DE3344462 A DE 3344462A DE 3344462 A1 DE3344462 A1 DE 3344462A1
Authority
DE
Germany
Prior art keywords
layer
contact
metallization
nickel
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19833344462
Other languages
German (de)
English (en)
Other versions
DE3344462C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Herbert J. Sherman Oaks Calif. Gould
Anders Rancho Palos Verdes Calif. Nilarp
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Americas Corp
Original Assignee
International Rectifier Corp USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/447,760 external-priority patent/US4878099A/en
Application filed by International Rectifier Corp USA filed Critical International Rectifier Corp USA
Publication of DE3344462A1 publication Critical patent/DE3344462A1/de
Application granted granted Critical
Publication of DE3344462C2 publication Critical patent/DE3344462C2/de
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30608Anisotropic liquid etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Die Bonding (AREA)
DE19833344462 1982-12-08 1983-12-08 Verfahren zur herstellung von halbleiterbauteilen Granted DE3344462A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44776182A 1982-12-08 1982-12-08
US06/447,760 US4878099A (en) 1982-12-08 1982-12-08 Metallizing system for semiconductor wafers

Publications (2)

Publication Number Publication Date
DE3344462A1 true DE3344462A1 (de) 1984-06-20
DE3344462C2 DE3344462C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-12-28

Family

ID=27035081

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19833344462 Granted DE3344462A1 (de) 1982-12-08 1983-12-08 Verfahren zur herstellung von halbleiterbauteilen

Country Status (5)

Country Link
DE (1) DE3344462A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2537778B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (2) GB2132412B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
IT (1) IT1194505B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
SE (1) SE8306663L (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3301666A1 (de) * 1983-01-20 1984-07-26 Brown, Boveri & Cie Ag, 6800 Mannheim Verfahren zur herstellung einer mehrschichtigen kontaktmetallisierung
JPH07118534B2 (ja) * 1990-02-22 1995-12-18 三菱電機株式会社 半導体装置の製造方法
US5422286A (en) * 1994-10-07 1995-06-06 United Microelectronics Corp. Process for fabricating high-voltage semiconductor power device
CN1241253C (zh) * 2002-06-24 2006-02-08 丰田合成株式会社 半导体元件的制造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1258235B (de) * 1965-01-04 1968-01-04 Licentia Gmbh Verfahren zur Herstellung einer, die Sperrspannungsfestigkeit erhoehenden Randzonenprofilierung von Siliziumscheiben
DE1286641B (de) * 1966-08-26 1969-01-09 Bosch Gmbh Robert Verfahren zur Kontaktierung einer Halbleiteranordnung
DE1789062A1 (de) * 1968-09-30 1972-01-05 Siemens Ag Verfahren zum Herstellen von Metallkontakten fuer den Einbau von Halbleiterbauelementen in Gehaeuse
DE1170558B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1961-08-12 1973-10-18
DE2656015A1 (de) * 1976-12-10 1978-06-15 Bbc Brown Boveri & Cie Verfahren zum herstellen von halbleiterbauelementen
DE2709802A1 (de) * 1977-03-07 1978-09-14 Siemens Ag Verfahren zur entfernung von bei ionenimplantationsprozessen in halbleitersystemen entstehenden verunreinigungen
DE3135993A1 (de) * 1980-09-15 1982-04-29 General Electric Co., Schenectady, N.Y. "verfahren zur herstellung von kontakten mit geringem widerstand in halbleitervorrichtungen"

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3288662A (en) * 1963-07-18 1966-11-29 Rca Corp Method of etching to dice a semiconductor slice
IT995593B (it) * 1972-12-11 1975-11-20 Rca Corp Dispositivo semiconduttore con connessioni a barretta e metodo di fabbricazione dello stesso
DE2332822B2 (de) * 1973-06-28 1978-04-27 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Herstellen von diffundierten, kontaktierten und oberflächenpassivierten Halbleiterbauelementen aus Halbleiterscheiben aus Silizium
GB1487201A (en) * 1974-12-20 1977-09-28 Lucas Electrical Ltd Method of manufacturing semi-conductor devices
US4042951A (en) * 1975-09-25 1977-08-16 Texas Instruments Incorporated Gold-germanium alloy contacts for a semiconductor device
IN144812B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1976-01-22 1978-07-15 Westinghouse Electric Corp
IT1059086B (it) * 1976-04-14 1982-05-31 Ates Componenti Elettron Procedimento per la passivazione di dispositivi a semiconduttore di potenza ad alta tensione inversa
GB2064860B (en) * 1979-10-18 1984-01-25 Gen Electric Method for metallizing a semiconductor element
CA1164734A (en) * 1980-07-11 1984-04-03 Michael Schneider Method for applying an anti-reflection coating to a solar cell

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1170558B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1961-08-12 1973-10-18
DE1258235B (de) * 1965-01-04 1968-01-04 Licentia Gmbh Verfahren zur Herstellung einer, die Sperrspannungsfestigkeit erhoehenden Randzonenprofilierung von Siliziumscheiben
DE1286641B (de) * 1966-08-26 1969-01-09 Bosch Gmbh Robert Verfahren zur Kontaktierung einer Halbleiteranordnung
DE1789062A1 (de) * 1968-09-30 1972-01-05 Siemens Ag Verfahren zum Herstellen von Metallkontakten fuer den Einbau von Halbleiterbauelementen in Gehaeuse
DE2656015A1 (de) * 1976-12-10 1978-06-15 Bbc Brown Boveri & Cie Verfahren zum herstellen von halbleiterbauelementen
DE2709802A1 (de) * 1977-03-07 1978-09-14 Siemens Ag Verfahren zur entfernung von bei ionenimplantationsprozessen in halbleitersystemen entstehenden verunreinigungen
DE3135993A1 (de) * 1980-09-15 1982-04-29 General Electric Co., Schenectady, N.Y. "verfahren zur herstellung von kontakten mit geringem widerstand in halbleitervorrichtungen"

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
J. Appl. Phys., Bd. 53 (3) März 1982, S. 1714-1719 *
J. Vac. Sci. Technol., 17(4), Juli/Aug. 1980, S. 775-792
Journal of the Electrochemical Society, Oktober 1981, S. 2170-2174 *
Journal of Vacuum Science and Technology, 16 (5), Sept./Okt. 1979, S. 1112-1119
Journal of Vacuum Science and Technology, 16 (5), Sept./Okt. 1979, S. 1112-1119 Journal of Vacuum Science and Technology, 19 (3), Sept. /Okt. 1981, S. 641-648 J. Vac. Sci. Technol., 17(4), Juli/Aug. 1980, S. 775-792 *
Journal of Vacuum Science and Technology, 19 (3), Sept. /Okt. 1981, S. 641-648

Also Published As

Publication number Publication date
GB2132412B (en) 1987-08-19
GB8529225D0 (en) 1986-01-02
DE3344462C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-12-28
FR2537778B1 (fr) 1986-12-19
FR2537778A1 (fr) 1984-06-15
GB2132412A (en) 1984-07-04
IT8324070A0 (it) 1983-12-06
GB2168843A (en) 1986-06-25
GB8332808D0 (en) 1984-01-18
SE8306663D0 (sv) 1983-12-02
SE8306663L (sv) 1984-06-09
GB2168843B (en) 1987-08-19
IT1194505B (it) 1988-09-22

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee