DE3164950D1 - Integrated mos semiconductor circuit - Google Patents

Integrated mos semiconductor circuit

Info

Publication number
DE3164950D1
DE3164950D1 DE8181101324T DE3164950T DE3164950D1 DE 3164950 D1 DE3164950 D1 DE 3164950D1 DE 8181101324 T DE8181101324 T DE 8181101324T DE 3164950 T DE3164950 T DE 3164950T DE 3164950 D1 DE3164950 D1 DE 3164950D1
Authority
DE
Germany
Prior art keywords
semiconductor circuit
mos semiconductor
integrated mos
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181101324T
Other languages
English (en)
Inventor
Kurt Dr Hoffmann
Dieter Dipl Ing Kantz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE8181101324T priority Critical patent/DE3164950D1/de
Application granted granted Critical
Publication of DE3164950D1 publication Critical patent/DE3164950D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
DE8181101324T 1980-03-11 1981-02-24 Integrated mos semiconductor circuit Expired DE3164950D1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE8181101324T DE3164950D1 (de) 1980-03-11 1981-02-24 Integrated mos semiconductor circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19803009303 DE3009303A1 (de) 1980-03-11 1980-03-11 Monolithisch integrierte digitale halbleiterschaltung
DE8181101324T DE3164950D1 (de) 1980-03-11 1981-02-24 Integrated mos semiconductor circuit

Publications (1)

Publication Number Publication Date
DE3164950D1 true DE3164950D1 (de) 1984-08-30

Family

ID=6096869

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19803009303 Withdrawn DE3009303A1 (de) 1980-03-11 1980-03-11 Monolithisch integrierte digitale halbleiterschaltung
DE8181101324T Expired DE3164950D1 (de) 1980-03-11 1981-02-24 Integrated mos semiconductor circuit

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19803009303 Withdrawn DE3009303A1 (de) 1980-03-11 1980-03-11 Monolithisch integrierte digitale halbleiterschaltung

Country Status (4)

Country Link
US (1) US4454431A (de)
EP (1) EP0036494B1 (de)
JP (1) JPS56142663A (de)
DE (2) DE3009303A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6177421A (ja) * 1984-08-21 1986-04-21 ラテイス・セミコンダクター・コーポレーシヨン Ｃｍｏｓデバイスのラツチアツプを防止する回路と方法
JPH0618249B2 (ja) * 1984-10-17 1994-03-09 富士通株式会社 半導体集積回路
DE3681540D1 (de) * 1985-08-26 1991-10-24 Siemens Ag Integrierte schaltung in komplementaerer schaltungstechnik mit einem substratvorspannungs-generator.
US4794278A (en) * 1987-12-30 1988-12-27 Intel Corporation Stable substrate bias generator for MOS circuits
KR950002015B1 (ko) * 1991-12-23 1995-03-08 삼성전자주식회사 하나의 오실레이터에 의해 동작되는 정전원 발생회로
CN105024674B (zh) * 2015-03-13 2018-06-12 苏州迈瑞微电子有限公司 一种异步复位装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3794862A (en) * 1972-04-05 1974-02-26 Rockwell International Corp Substrate bias circuit
US3838357A (en) * 1973-10-25 1974-09-24 Honeywell Inf Systems Apparatus for using start-up of a crystal oscillator to synchronize power turn-on in various portions of a system
IT1073440B (it) * 1975-09-22 1985-04-17 Seiko Instr & Electronics Circuito elevatore di tensione realizzato in mos-fet
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
JPS53130990A (en) * 1977-04-20 1978-11-15 Toshiba Corp Integrated circuit device
US4142114A (en) * 1977-07-18 1979-02-27 Mostek Corporation Integrated circuit with threshold regulation
DE2812378C2 (de) * 1978-03-21 1982-04-29 Siemens AG, 1000 Berlin und 8000 München Substratvorspannungsgenerator für integrierte MIS-Schaltkreise
JPS5525220A (en) * 1978-08-11 1980-02-22 Oki Electric Ind Co Ltd Substrate bias generation circuit
US4229667A (en) * 1978-08-23 1980-10-21 Rockwell International Corporation Voltage boosting substrate bias generator
JPS5951750B2 (ja) * 1978-11-24 1984-12-15 富士通株式会社 基板バイアス発生回路
US4296340A (en) * 1979-08-27 1981-10-20 Intel Corporation Initializing circuit for MOS integrated circuits

Also Published As

Publication number Publication date
EP0036494A3 (en) 1981-11-25
US4454431A (en) 1984-06-12
JPS56142663A (en) 1981-11-07
EP0036494B1 (de) 1984-07-25
EP0036494A2 (de) 1981-09-30
DE3009303A1 (de) 1981-09-24
JPH0213821B2 (de) 1990-04-05

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