DE3132955C2 - - Google Patents

Info

Publication number
DE3132955C2
DE3132955C2 DE3132955A DE3132955A DE3132955C2 DE 3132955 C2 DE3132955 C2 DE 3132955C2 DE 3132955 A DE3132955 A DE 3132955A DE 3132955 A DE3132955 A DE 3132955A DE 3132955 C2 DE3132955 C2 DE 3132955C2
Authority
DE
Germany
Prior art keywords
semiconductor
layer
zone
insulating layer
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3132955A
Other languages
German (de)
English (en)
Other versions
DE3132955A1 (de
Inventor
Josef Dipl.-Phys. 7101 Massenbachhausen De Wolf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken Electronic GmbH
Original Assignee
Telefunken Electronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Electronic GmbH filed Critical Telefunken Electronic GmbH
Priority to DE19813132955 priority Critical patent/DE3132955A1/de
Publication of DE3132955A1 publication Critical patent/DE3132955A1/de
Application granted granted Critical
Publication of DE3132955C2 publication Critical patent/DE3132955C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
    • H10D64/2527—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE19813132955 1981-08-20 1981-08-20 Feldeffekttransistor und verfahren zu seiner herstellung Granted DE3132955A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19813132955 DE3132955A1 (de) 1981-08-20 1981-08-20 Feldeffekttransistor und verfahren zu seiner herstellung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813132955 DE3132955A1 (de) 1981-08-20 1981-08-20 Feldeffekttransistor und verfahren zu seiner herstellung

Publications (2)

Publication Number Publication Date
DE3132955A1 DE3132955A1 (de) 1983-03-03
DE3132955C2 true DE3132955C2 (enrdf_load_stackoverflow) 1987-08-13

Family

ID=6139741

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813132955 Granted DE3132955A1 (de) 1981-08-20 1981-08-20 Feldeffekttransistor und verfahren zu seiner herstellung

Country Status (1)

Country Link
DE (1) DE3132955A1 (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4625388A (en) * 1982-04-26 1986-12-02 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask and resulting structure
EP0227894A3 (en) * 1985-12-19 1988-07-13 SILICONIX Incorporated High density vertical dmos transistor
US5182234A (en) * 1986-03-21 1993-01-26 Advanced Power Technology, Inc. Profile tailored trench etch using a SF6 -O2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen
US4895810A (en) * 1986-03-21 1990-01-23 Advanced Power Technology, Inc. Iopographic pattern delineated power mosfet with profile tailored recessed source
WO2003100864A2 (en) * 2002-05-21 2003-12-04 Rensselaer Polytechnic Institute High-voltage semiconductor device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4219835A (en) * 1978-02-17 1980-08-26 Siliconix, Inc. VMOS Mesa structure and manufacturing process
DE3016749A1 (de) * 1980-04-30 1981-11-05 Siemens AG, 1000 Berlin und 8000 München Kontakt fuer mis-halbleiterbauelement und verfahren zu seiner herstellung

Also Published As

Publication number Publication date
DE3132955A1 (de) 1983-03-03

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Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: TELEFUNKEN ELECTRONIC GMBH, 7100 HEILBRONN, DE

8120 Willingness to grant licences paragraph 23
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee