DE3122381A1 - Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes - Google Patents

Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes

Info

Publication number
DE3122381A1
DE3122381A1 DE19813122381 DE3122381A DE3122381A1 DE 3122381 A1 DE3122381 A1 DE 3122381A1 DE 19813122381 DE19813122381 DE 19813122381 DE 3122381 A DE3122381 A DE 3122381A DE 3122381 A1 DE3122381 A1 DE 3122381A1
Authority
DE
Germany
Prior art keywords
bits
data
check
data word
byte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19813122381
Other languages
German (de)
English (en)
Inventor
Volkmar Dipl.-Ing. 7031 Grafenau Götze
Günther Dipl.-Ing. 7032 Sindelfingen Potz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
Original Assignee
IBM Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH filed Critical IBM Deutschland GmbH
Priority to DE19813122381 priority Critical patent/DE3122381A1/de
Priority to JP57038264A priority patent/JPS57203146A/ja
Priority to US06/358,737 priority patent/US4450561A/en
Priority to EP82103932A priority patent/EP0067301B1/de
Priority to DE8282103932T priority patent/DE3277093D1/de
Publication of DE3122381A1 publication Critical patent/DE3122381A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
DE19813122381 1981-06-05 1981-06-05 Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes Withdrawn DE3122381A1 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE19813122381 DE3122381A1 (de) 1981-06-05 1981-06-05 Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes
JP57038264A JPS57203146A (en) 1981-06-05 1982-03-12 Inspection bit generation circuit
US06/358,737 US4450561A (en) 1981-06-05 1982-03-16 Method and device for generating check bits protecting a data word
EP82103932A EP0067301B1 (de) 1981-06-05 1982-05-06 Einrichtung zur Erzeugung von Prüfbits zur Sicherung eines Datenwortes
DE8282103932T DE3277093D1 (en) 1981-06-05 1982-05-06 Device for the generation of check bits for data word protection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813122381 DE3122381A1 (de) 1981-06-05 1981-06-05 Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes

Publications (1)

Publication Number Publication Date
DE3122381A1 true DE3122381A1 (de) 1982-12-23

Family

ID=6134018

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19813122381 Withdrawn DE3122381A1 (de) 1981-06-05 1981-06-05 Verfahren und einrichtung zur erzeugung von pruefbits zur sicherung eines datenwortes
DE8282103932T Expired DE3277093D1 (en) 1981-06-05 1982-05-06 Device for the generation of check bits for data word protection

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8282103932T Expired DE3277093D1 (en) 1981-06-05 1982-05-06 Device for the generation of check bits for data word protection

Country Status (4)

Country Link
US (1) US4450561A (enrdf_load_stackoverflow)
EP (1) EP0067301B1 (enrdf_load_stackoverflow)
JP (1) JPS57203146A (enrdf_load_stackoverflow)
DE (2) DE3122381A1 (enrdf_load_stackoverflow)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2533091A1 (fr) * 1982-09-13 1984-03-16 Cii Honeywell Bull Systeme de detection et de correction d'erreurs de transmission d'un message binaire utilisant un code cyclique detecteur et correcteur d'erreurs de type reed-solomon entrelace
US4712215A (en) * 1985-12-02 1987-12-08 Advanced Micro Devices, Inc. CRC calculation machine for separate calculation of checkbits for the header packet and data packet
JPH0760394B2 (ja) * 1986-12-18 1995-06-28 株式会社日立製作所 誤り訂正・検出方式
US4868829A (en) * 1987-09-29 1989-09-19 Hewlett-Packard Company Apparatus useful for correction of single bit errors in the transmission of data
JPH01150940A (ja) * 1987-12-08 1989-06-13 Hitachi Ltd Ｃｒｃ演算方式
US4928280A (en) * 1988-04-29 1990-05-22 International Business Machines Corporation Fast processor for multi-bit error correction codes
EP0343742B1 (en) * 1988-05-27 1995-08-09 Philips Electronics Uk Limited Decoders for Hamming encoded data
WO1990010265A1 (en) * 1989-02-16 1990-09-07 Grumman Aerospace Corporation Very high speed error detection network
JPH0398168U (enrdf_load_stackoverflow) * 1990-01-30 1991-10-11
US5375127A (en) * 1992-03-25 1994-12-20 Ncr Corporation Method and apparatus for generating Reed-Soloman error correcting code across multiple word boundaries
US5539754A (en) * 1992-10-05 1996-07-23 Hewlett-Packard Company Method and circuitry for generating syndrome bits within an error correction and detection circuit
US5909541A (en) * 1993-07-14 1999-06-01 Honeywell Inc. Error detection and correction for data stored across multiple byte-wide memory devices
US5630054A (en) * 1995-04-18 1997-05-13 Mti Technology Center Method and apparatus for storing and retrieving error check information
US6018817A (en) * 1997-12-03 2000-01-25 International Business Machines Corporation Error correcting code retrofit method and apparatus for multiple memory configurations
US6044483A (en) * 1998-01-29 2000-03-28 International Business Machines Corporation Error propagation operating mode for error correcting code retrofit apparatus
US6745363B2 (en) * 1999-07-30 2004-06-01 Hewlett-Packard Development Company, Lp Early error detection using ECC
US6463563B1 (en) 1999-11-30 2002-10-08 International Business Machines Corporation Single symbol correction double symbol detection code employing a modular H-matrix
JP2002116961A (ja) * 2000-10-11 2002-04-19 Nec Corp シリアル通信装置およびシリアル通信方法
JP4042841B2 (ja) * 2002-03-29 2008-02-06 富士通株式会社 行列演算処理装置
US7010469B2 (en) * 2003-09-30 2006-03-07 International Business Machines Corporation Method of computing partial CRCs
US7546514B2 (en) * 2005-04-11 2009-06-09 Hewlett-Packard Development Company, L.P. Chip correct and fault isolation in computer memory systems
US8069392B1 (en) 2007-10-16 2011-11-29 Integrated Device Technology, Inc. Error correction code system and method
US8347165B2 (en) * 2007-12-17 2013-01-01 Micron Technology, Inc. Self-timed error correcting code evaluation system and method
US8806316B2 (en) 2012-01-11 2014-08-12 Micron Technology, Inc. Circuits, integrated circuits, and methods for interleaved parity computation
US10284400B2 (en) * 2015-09-01 2019-05-07 Nec Corporation Delta-sigma modulator, transmitter, and integrator
CN113053451B (zh) * 2021-03-05 2022-05-10 深圳三地一芯电子有限责任公司 Nandflash内生成softbit的方法、系统、主机以及储存介质

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3218612A (en) * 1961-11-09 1965-11-16 Ibm Data transfer system
US3745526A (en) * 1971-12-20 1973-07-10 Ibm Shift register error correcting system
US3825893A (en) * 1973-05-29 1974-07-23 Ibm Modular distributed error detection and correction apparatus and method
US4312068A (en) * 1976-08-12 1982-01-19 Honeywell Information Systems Inc. Parallel generation of serial cyclic redundancy check
JPS5832421B2 (ja) * 1976-09-10 1983-07-13 株式会社日立製作所 フイ−ドバツクシフトレジスタ
US4355391A (en) * 1980-03-31 1982-10-19 Texas Instruments Incorporated Apparatus and method of error detection and/or correction in a data set

Also Published As

Publication number Publication date
JPS6217257B2 (enrdf_load_stackoverflow) 1987-04-16
EP0067301B1 (de) 1987-08-26
EP0067301A3 (en) 1984-07-18
JPS57203146A (en) 1982-12-13
US4450561A (en) 1984-05-22
DE3277093D1 (en) 1987-10-01
EP0067301A2 (de) 1982-12-22

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Legal Events

Date Code Title Description
8141 Disposal/no request for examination