DE2967564D1 - A semiconductor memory device - Google Patents

A semiconductor memory device

Info

Publication number
DE2967564D1
DE2967564D1 DE7979301831T DE2967564T DE2967564D1 DE 2967564 D1 DE2967564 D1 DE 2967564D1 DE 7979301831 T DE7979301831 T DE 7979301831T DE 2967564 T DE2967564 T DE 2967564T DE 2967564 D1 DE2967564 D1 DE 2967564D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7979301831T
Other languages
English (en)
Inventor
Toshitaka Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE2967564D1 publication Critical patent/DE2967564D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0744Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
    • H01L27/075Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
    • H01L27/0755Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H01L27/0761Vertical bipolar transistor in combination with diodes only
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/926Elongated lead extending axially through another elongated lead

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Bipolar Integrated Circuits (AREA)
DE7979301831T 1978-09-08 1979-09-05 A semiconductor memory device Expired DE2967564D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53110503A JPS607388B2 (ja) 1978-09-08 1978-09-08 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE2967564D1 true DE2967564D1 (en) 1986-02-27

Family

ID=14537409

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7979301831T Expired DE2967564D1 (en) 1978-09-08 1979-09-05 A semiconductor memory device

Country Status (4)

Country Link
US (1) US4287569A (de)
EP (1) EP0008946B1 (de)
JP (1) JPS607388B2 (de)
DE (1) DE2967564D1 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2070329B (en) * 1980-01-25 1983-10-26 Tokyo Shibaura Electric Co Semiconductor memory device
US4404654A (en) * 1980-01-29 1983-09-13 Sharp Kabushiki Kaisha Semiconductor device system
FR2490860B1 (fr) * 1980-09-24 1986-11-28 Nippon Telegraph & Telephone Dispositif semi-conducteur de memorisation programmable a lecture seule, de type a jonction en court-circuit
US4442507A (en) * 1981-02-23 1984-04-10 Burroughs Corporation Electrically programmable read-only memory stacked above a semiconductor substrate
US4412308A (en) * 1981-06-15 1983-10-25 International Business Machines Corporation Programmable bipolar structures
US4403399A (en) * 1981-09-28 1983-09-13 Harris Corporation Method of fabricating a vertical fuse utilizing epitaxial deposition and special masking
JPS592291A (ja) * 1982-06-28 1984-01-07 Fujitsu Ltd プログラマブル・リ−ドオンリ・メモリ装置
JPS60143500A (ja) * 1983-12-29 1985-07-29 Fujitsu Ltd プログラマブル半導体記憶装置
JPS60142559A (ja) * 1983-12-29 1985-07-27 Fujitsu Ltd プログラマブル・リ−ド・オンリ・メモリ
US4651409A (en) * 1984-02-09 1987-03-24 Ncr Corporation Method of fabricating a high density, low power, merged vertical fuse/bipolar transistor
US4609241A (en) * 1984-05-25 1986-09-02 4C Electronics, Inc. Programmable programmed socket
US4646427A (en) * 1984-06-28 1987-03-03 Motorola, Inc. Method of electrically adjusting the zener knee of a lateral polysilicon zener diode
US4734886A (en) * 1985-10-22 1988-03-29 Harris Corporation Auxiliary word line driver for effectively controlling programmability of fusible links
US4906987A (en) * 1985-10-29 1990-03-06 Ohio Associated Enterprises, Inc. Printed circuit board system and method
JPS62128172A (ja) * 1985-11-28 1987-06-10 Fujitsu Ltd 接合短絡型プログラマブルリ−ドオンリメモリ
DE3786693T2 (de) * 1986-04-17 1994-02-10 Exar Corp Programmierbarer Kontaktfleck.
US4935645A (en) * 1988-03-02 1990-06-19 Dallas Semiconductor Corporation Fusing and detection circuit
JPH01275991A (ja) * 1988-04-26 1989-11-06 Junkosha Co Ltd 管継手
US5208780A (en) * 1990-07-17 1993-05-04 Kabushiki Kaisha Toshiba Structure of electrically programmable read-only memory cells and redundancy signature therefor
US5661047A (en) * 1994-10-05 1997-08-26 United Microelectronics Corporation Method for forming bipolar ROM device
US5847441A (en) * 1996-05-10 1998-12-08 Micron Technology, Inc. Semiconductor junction antifuse circuit
US6587394B2 (en) * 2001-07-24 2003-07-01 Hewlett-Packard Development Company, L.P. Programmable address logic for solid state diode-based memory
US6661704B2 (en) * 2001-12-10 2003-12-09 Hewlett-Packard Development Company, L.P. Diode decoupled sensing method and apparatus
US20060067117A1 (en) * 2004-09-29 2006-03-30 Matrix Semiconductor, Inc. Fuse memory cell comprising a diode, the diode serving as the fuse element
EP1948680A4 (de) * 2005-10-28 2010-01-13 Univ California Verfahren und verbindungen zum nachweis und zum isolieren von lymphomzellen
US9336860B1 (en) 2015-05-20 2016-05-10 International Business Machines Corporation Complementary bipolar SRAM
US11145379B2 (en) * 2019-10-29 2021-10-12 Key Foundry Co., Ltd. Electronic fuse cell array structure
KR102284263B1 (ko) 2019-10-29 2021-07-30 주식회사 키 파운드리 이-퓨즈 셀 및 이를 포함하는 비휘발성 메모리 장치

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1499444A (fr) * 1966-09-16 1967-10-27 Constr Telephoniques Matrice de circuits logiques intégrés
US3529299A (en) * 1966-10-21 1970-09-15 Texas Instruments Inc Programmable high-speed read-only memory devices
US3510689A (en) * 1966-11-01 1970-05-05 Massachusetts Inst Technology Bistable flip-flop circuit with memory
US3533088A (en) * 1967-10-31 1970-10-06 Rca Corp Control circuit for memory
US3611319A (en) * 1969-03-06 1971-10-05 Teledyne Inc Electrically alterable read only memory
US3576549A (en) * 1969-04-14 1971-04-27 Cogar Corp Semiconductor device, method, and memory array
US3721964A (en) * 1970-02-18 1973-03-20 Hewlett Packard Co Integrated circuit read only memory bit organized in coincident select structure
US3742592A (en) * 1970-07-13 1973-07-03 Intersil Inc Electrically alterable integrated circuit read only memory unit and process of manufacturing
BE794202A (fr) * 1972-01-19 1973-05-16 Intel Corp Liaison fusible pour circuit integre sur substrat semi-conducteur pour memoires
FR2228271B1 (de) * 1973-05-04 1976-11-12 Honeywell Bull Soc Ind
JPS5751195B2 (de) * 1974-07-03 1982-10-30
JPS6127840B2 (de) * 1974-11-27 1986-06-27 Fujitsu Ltd
US4014007A (en) * 1975-01-21 1977-03-22 Siemens Aktiengesellschaft Circuit arrangement for placing information in a programmable ecl read only memory
US3979734A (en) * 1975-06-16 1976-09-07 International Business Machines Corporation Multiple element charge storage memory cell
JPS5252582A (en) * 1975-10-25 1977-04-27 Toshiba Corp Device and production for semiconductor
FR2334170A1 (fr) * 1975-12-05 1977-07-01 Honeywell Bull Soc Ind Memoire morte integree
US4064493A (en) * 1976-06-03 1977-12-20 Motorola, Inc. P-ROM Cell having a low current fusible programming link
FR2369652A1 (fr) * 1976-10-29 1978-05-26 Radiotechnique Compelec Memoire morte programmable a transistors
JPS6018148B2 (ja) * 1976-11-30 1985-05-09 富士通株式会社 半導体記憶装置の製造方法
IT1106983B (it) * 1977-01-24 1985-11-18 Western Electric Co Memoria a transistori e condensatori

Also Published As

Publication number Publication date
JPS5538016A (en) 1980-03-17
EP0008946A3 (en) 1980-04-02
JPS607388B2 (ja) 1985-02-23
EP0008946A2 (de) 1980-03-19
US4287569A (en) 1981-09-01
EP0008946B1 (de) 1986-01-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee