DE2939021C2 - Verfahren zum digitalen Vervielfachen einer Signal-Frequenz - Google Patents

Verfahren zum digitalen Vervielfachen einer Signal-Frequenz

Info

Publication number
DE2939021C2
DE2939021C2 DE2939021A DE2939021A DE2939021C2 DE 2939021 C2 DE2939021 C2 DE 2939021C2 DE 2939021 A DE2939021 A DE 2939021A DE 2939021 A DE2939021 A DE 2939021A DE 2939021 C2 DE2939021 C2 DE 2939021C2
Authority
DE
Germany
Prior art keywords
signal
frequency
output
input
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2939021A
Other languages
German (de)
English (en)
Other versions
DE2939021A1 (de
Inventor
Mark Layne Mesa Ariz. Shaw
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE2939021A1 publication Critical patent/DE2939021A1/de
Application granted granted Critical
Publication of DE2939021C2 publication Critical patent/DE2939021C2/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • G01R23/10Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into a train of pulses, which are then counted, i.e. converting the signal into a square wave
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/68Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using pulse rate multipliers or dividers pulse rate multipliers or dividers per se
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
DE2939021A 1978-09-28 1979-09-26 Verfahren zum digitalen Vervielfachen einer Signal-Frequenz Expired DE2939021C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/946,474 US4224574A (en) 1978-09-28 1978-09-28 Digital frequency quadrupler

Publications (2)

Publication Number Publication Date
DE2939021A1 DE2939021A1 (de) 1980-04-10
DE2939021C2 true DE2939021C2 (de) 1984-06-20

Family

ID=25484518

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2939021A Expired DE2939021C2 (de) 1978-09-28 1979-09-26 Verfahren zum digitalen Vervielfachen einer Signal-Frequenz

Country Status (6)

Country Link
US (1) US4224574A (enExample)
JP (1) JPS5545294A (enExample)
DE (1) DE2939021C2 (enExample)
FR (1) FR2437742A1 (enExample)
GB (1) GB2030745B (enExample)
MY (1) MY8600718A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5753729U (enExample) * 1980-09-10 1982-03-29
US4394769A (en) * 1981-06-15 1983-07-19 Hughes Aircraft Company Dual modulus counter having non-inverting feedback
JPS58152336U (ja) * 1982-03-31 1983-10-12 日東工器株式会社 鉄筋のスリ−ブ固着装置
US4845437A (en) * 1985-07-09 1989-07-04 Minolta Camera Kabushiki Kaisha Synchronous clock frequency conversion circuit
DE3643947C2 (de) * 1986-12-22 1995-11-02 Vdo Schindling Schaltungsanordnung zum Abgleich der Frequenz eines Oszillators
DE3822428A1 (de) * 1988-06-30 1990-01-04 Siemens Ag Schaltungsanordnung zur erzeugung eines referenztaktes

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3743946A (en) * 1971-06-11 1973-07-03 Halliburton Co Variable frequency multiplier and phase shifter
US3832640A (en) * 1972-12-11 1974-08-27 Ford Motor Co Time division interpolator
US3835396A (en) * 1973-09-12 1974-09-10 G Demos Device for changing frequency of constant amplitude square waves
US3935539A (en) * 1974-04-08 1976-01-27 The United States Of America As Represented By The Secretary Of The Navy A-C signal multiplying circuit by a ratio of whole numbers the numerator of which is greater than one and greater than the denominator
US4025866A (en) * 1975-11-10 1977-05-24 Nasa Open loop digital frequency multiplier
US4017719A (en) * 1975-12-18 1977-04-12 Rca Corporation Binary rate multiplier with means for spacing output signals
US3993957A (en) * 1976-03-08 1976-11-23 International Business Machines Corporation Clock converter circuit
US4072904A (en) * 1976-09-23 1978-02-07 The United States Of America As Represented By The Secretary Of The Navy Presettable rate multiplier

Also Published As

Publication number Publication date
FR2437742B1 (enExample) 1984-02-10
JPS5545294A (en) 1980-03-29
FR2437742A1 (fr) 1980-04-25
MY8600718A (en) 1986-12-31
DE2939021A1 (de) 1980-04-10
GB2030745B (en) 1983-09-07
US4224574A (en) 1980-09-23
GB2030745A (en) 1980-04-10

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee