DE2733051A1 - Programmiereinrichtung - Google Patents

Programmiereinrichtung

Info

Publication number
DE2733051A1
DE2733051A1 DE19772733051 DE2733051A DE2733051A1 DE 2733051 A1 DE2733051 A1 DE 2733051A1 DE 19772733051 DE19772733051 DE 19772733051 DE 2733051 A DE2733051 A DE 2733051A DE 2733051 A1 DE2733051 A1 DE 2733051A1
Authority
DE
Germany
Prior art keywords
data
memory
cells
main program
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19772733051
Other languages
German (de)
English (en)
Inventor
William Arthur Minnick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Guidance and Electronics Co Inc
Original Assignee
Itek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itek Corp filed Critical Itek Corp
Publication of DE2733051A1 publication Critical patent/DE2733051A1/de
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE19772733051 1976-08-27 1977-07-21 Programmiereinrichtung Ceased DE2733051A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/718,299 US4085439A (en) 1976-08-27 1976-08-27 Computer programming system having greatly reduced storage capacity and high speed

Publications (1)

Publication Number Publication Date
DE2733051A1 true DE2733051A1 (de) 1978-03-02

Family

ID=24885587

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19772733051 Ceased DE2733051A1 (de) 1976-08-27 1977-07-21 Programmiereinrichtung

Country Status (5)

Country Link
US (1) US4085439A (enExample)
JP (1) JPS5329040A (enExample)
DE (1) DE2733051A1 (enExample)
FR (1) FR2363149A1 (enExample)
NL (1) NL7708467A (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6049332B2 (ja) * 1977-01-31 1985-11-01 株式会社東芝 マイクロプログラム制御方式
US4218757A (en) * 1978-06-29 1980-08-19 Burroughs Corporation Device for automatic modification of ROM contents by a system selected variable
KR100764052B1 (ko) * 2006-08-03 2007-10-08 삼성전자주식회사 유동적 어드레스 바운더리를 갖는 플래시 메모리 장치 및그것의 프로그램 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2336676A1 (de) * 1973-07-19 1975-01-30 Ibm Deutschland Einrichtung zur modifizierung von mikroprogrammbefehlen

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3839705A (en) * 1972-12-14 1974-10-01 Gen Electric Data processor including microprogram control means
US3800293A (en) * 1972-12-26 1974-03-26 Ibm Microprogram control subsystem
US3859636A (en) * 1973-03-22 1975-01-07 Bell Telephone Labor Inc Microprogram controlled data processor for executing microprogram instructions from microprogram memory or main memory
US3953833A (en) * 1974-08-21 1976-04-27 Technology Marketing Incorporated Microprogrammable computer having a dual function secondary storage element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2336676A1 (de) * 1973-07-19 1975-01-30 Ibm Deutschland Einrichtung zur modifizierung von mikroprogrammbefehlen

Also Published As

Publication number Publication date
JPS5329040A (en) 1978-03-17
US4085439A (en) 1978-04-18
NL7708467A (nl) 1978-03-01
FR2363149B1 (enExample) 1984-12-14
FR2363149A1 (fr) 1978-03-24

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8131 Rejection