DE2718449A1 - Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte anordnung - Google Patents

Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte anordnung

Info

Publication number
DE2718449A1
DE2718449A1 DE19772718449 DE2718449A DE2718449A1 DE 2718449 A1 DE2718449 A1 DE 2718449A1 DE 19772718449 DE19772718449 DE 19772718449 DE 2718449 A DE2718449 A DE 2718449A DE 2718449 A1 DE2718449 A1 DE 2718449A1
Authority
DE
Germany
Prior art keywords
layer
region
area
produced
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19772718449
Other languages
German (de)
English (en)
Other versions
DE2718449C2 (enExample
Inventor
Hendrik Cornelis De Graaff
Paul Anton Herman Hart
Albert Schmitz
Jan Willem Slotboom
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2718449A1 publication Critical patent/DE2718449A1/de
Application granted granted Critical
Publication of DE2718449C2 publication Critical patent/DE2718449C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H10P32/1412—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only through the applied layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special

Landscapes

  • Bipolar Transistors (AREA)
DE19772718449 1976-04-27 1977-04-26 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte anordnung Granted DE2718449A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7604445A NL7604445A (nl) 1976-04-27 1976-04-27 Werkwijze ter vervaardiging van een halfgelei- derinrichting, en inrichting vervaardigd door toepassing van de werkwijze.

Publications (2)

Publication Number Publication Date
DE2718449A1 true DE2718449A1 (de) 1977-11-10
DE2718449C2 DE2718449C2 (enExample) 1987-11-26

Family

ID=19826076

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19772718449 Granted DE2718449A1 (de) 1976-04-27 1977-04-26 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte anordnung

Country Status (8)

Country Link
US (1) US4151006A (enExample)
JP (1) JPS52139386A (enExample)
CA (1) CA1085061A (enExample)
DE (1) DE2718449A1 (enExample)
FR (1) FR2349955A1 (enExample)
GB (1) GB1522291A (enExample)
IT (1) IT1078440B (enExample)
NL (1) NL7604445A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029887A1 (de) * 1979-12-03 1981-06-10 International Business Machines Corporation Verfahren zum Herstellen eines vertikalen PNP-Transistors und so hergestellter Transistor

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7810549A (nl) * 1978-10-23 1980-04-25 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting.
US4228452A (en) * 1979-05-02 1980-10-14 Eastman Kodak Company Silicon device with uniformly thick polysilicon
US4452645A (en) * 1979-11-13 1984-06-05 International Business Machines Corporation Method of making emitter regions by implantation through a non-monocrystalline layer
US4534806A (en) * 1979-12-03 1985-08-13 International Business Machines Corporation Method for manufacturing vertical PNP transistor with shallow emitter
US4301588A (en) * 1980-02-01 1981-11-24 International Business Machines Corporation Consumable amorphous or polysilicon emitter process
US4380774A (en) * 1980-12-19 1983-04-19 The United States Of America As Represented By The Secretary Of The Navy High-performance bipolar microwave transistor
US4633287A (en) * 1982-08-09 1986-12-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor photoelectric conversion device
US4713355A (en) * 1984-04-16 1987-12-15 Trw Inc. Bipolar transistor construction
US4604150A (en) * 1985-01-25 1986-08-05 At&T Bell Laboratories Controlled boron doping of silicon
USRE35642E (en) * 1987-12-22 1997-10-28 Sgs-Thomson Microelectronics, S.R.L. Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process
IT1217323B (it) * 1987-12-22 1990-03-22 Sgs Microelettronica Spa Struttura integrata di transistor bipolare di potenza di alta tensione e di transistor mos di potenza di bassa tensione nella configurazione"emitter switching"e relativo processo di fabbricazione
US5008208A (en) * 1988-12-07 1991-04-16 Honeywell Inc. Method of making planarized, self-aligned bipolar integrated circuits
US5028973A (en) * 1989-06-19 1991-07-02 Harris Corporation Bipolar transistor with high efficient emitter
US5296047A (en) * 1992-01-28 1994-03-22 Hewlett-Packard Co. Epitaxial silicon starting material
US5324684A (en) * 1992-02-25 1994-06-28 Ag Processing Technologies, Inc. Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure
US5989962A (en) * 1997-09-26 1999-11-23 Texas Instruments Incorporated Semiconductor device having dual gate and method of formation
US7482642B2 (en) * 2005-03-11 2009-01-27 Lsi Corporation Bipolar transistors having controllable temperature coefficient of current gain

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2429957A1 (de) * 1974-06-21 1976-01-08 Siemens Ag Verfahren zur herstellung einer dotierten zone eines leitfaehigkeitstyps in einem halbleiterkoerper

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3536547A (en) * 1968-03-25 1970-10-27 Bell Telephone Labor Inc Plasma deposition of oxide coatings on silicon and electron bombardment of portions thereof to be etched selectively
US3775191A (en) * 1971-06-28 1973-11-27 Bell Canada Northern Electric Modification of channel regions in insulated gate field effect transistors
US3847687A (en) * 1972-11-15 1974-11-12 Motorola Inc Methods of forming self aligned transistor structure having polycrystalline contacts
US4027324A (en) * 1972-12-29 1977-05-31 Sony Corporation Bidirectional transistor
US4032957A (en) * 1972-12-29 1977-06-28 Sony Corporation Semiconductor device
US4032956A (en) * 1972-12-29 1977-06-28 Sony Corporation Transistor circuit
US4007474A (en) * 1972-12-29 1977-02-08 Sony Corporation Transistor having an emitter with a low impurity concentration portion and a high impurity concentration portion
US4028155A (en) * 1974-02-28 1977-06-07 Lfe Corporation Process and material for manufacturing thin film integrated circuits
GB1502165A (en) * 1974-04-10 1978-02-22 Sony Corp Semiconductor devices
JPS50137478A (enExample) * 1974-04-18 1975-10-31
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2429957A1 (de) * 1974-06-21 1976-01-08 Siemens Ag Verfahren zur herstellung einer dotierten zone eines leitfaehigkeitstyps in einem halbleiterkoerper

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Supplement to the Journal of the Japan Society of Applied Physics, Bd. 44, 1975, S. 279-283 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029887A1 (de) * 1979-12-03 1981-06-10 International Business Machines Corporation Verfahren zum Herstellen eines vertikalen PNP-Transistors und so hergestellter Transistor

Also Published As

Publication number Publication date
NL7604445A (nl) 1977-10-31
DE2718449C2 (enExample) 1987-11-26
US4151006A (en) 1979-04-24
CA1085061A (en) 1980-09-02
JPS6112388B2 (enExample) 1986-04-08
IT1078440B (it) 1985-05-08
FR2349955A1 (fr) 1977-11-25
GB1522291A (en) 1978-08-23
FR2349955B1 (enExample) 1983-06-17
JPS52139386A (en) 1977-11-21

Similar Documents

Publication Publication Date Title
EP0001550B1 (de) Integrierte Halbleiteranordnung für eine Bauelementstruktur mit kleinen Abmessungen und zugehöriges Herstellungsvefahren
DE3105118C2 (de) Verfahren zur Herstellung einer integrierten Schaltung mit komplementären bipolaren Transistoren und komplementären Isolierschicht-Gate-Feldeffekttransistoren auf einem gemeinsamen Substrat
DE3019850C2 (enExample)
DE68911702T2 (de) Halbleitervorrichtung mit zusammengesetztem Substrat, hergestellt aus zwei Halbleitersubstraten in engem Kontakt.
DE2823967C2 (enExample)
DE2718449A1 (de) Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte anordnung
DE2711562A1 (de) Halbleiteranordnung und deren herstellung
DE2133978B2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2160427C3 (enExample)
DE2618965A1 (de) Bipolares halbleiterbauelement
DE2441432B2 (de) Verfahren zur Herstellung eines VMOS-Transistors
EP0025854A1 (de) Verfahren zum Herstellen von bipolaren Transistoren
DE3116268C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2019655C2 (de) Verfahren zur Eindiffundierung eines den Leitungstyp verändernden Aktivators in einen Oberflächenbereich eines Halbleiterkörpers
DE69415500T2 (de) Verfahren zur Herstellung eines Halbleiterbauteils mit vergrabenem Übergang
DE2133979C3 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2617293C3 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE2502547A1 (de) Halbleiterkoerper mit bipolartransistor und verfahren zu dessen herstellung
DE2448478A1 (de) Verfahren zum herstellen von pn-halbleiteruebergaengen
DE2558925C2 (de) Verfahren zur Herstellung einer integrierten Injektions-Schaltungsanordnung
DE1564406C3 (de) Verfahren zur Herstellung einer Halbleiteranordnung und danach hergestellte Halbleiteranordnung
DE2318179A1 (de) Halbleiteranordnung und verfahren zur herstellung dieser anordnung
EP0003330A1 (de) Verfahren zum Herstellen von hochintegrierten Halbleiteranordnungen mit aneinandergrenzenden, hochdotierten Halbleiterzonen entgegengesetzten Leitungstyps
DE2801680A1 (de) Verfahren zur herstellung einer halbleitereinrichtung
WO1999038205A1 (de) Verfahren zur herstellung von dioden

Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee