DE2558017C2 - Schaltungsanordnung zur Durchführung Boolescher Verknüpfungen digitaler Signale - Google Patents

Schaltungsanordnung zur Durchführung Boolescher Verknüpfungen digitaler Signale

Info

Publication number
DE2558017C2
DE2558017C2 DE2558017A DE2558017A DE2558017C2 DE 2558017 C2 DE2558017 C2 DE 2558017C2 DE 2558017 A DE2558017 A DE 2558017A DE 2558017 A DE2558017 A DE 2558017A DE 2558017 C2 DE2558017 C2 DE 2558017C2
Authority
DE
Germany
Prior art keywords
transistor
transistors
collector
base
arrangement according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2558017A
Other languages
German (de)
English (en)
Other versions
DE2558017A1 (de
Inventor
Robert C. Dallas Tex. Martin
Benjamin J. Richardson Tex. Sloan
Scott M. Weathersby Jun.
Earl C. Houston Tex. Wilson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE2558017A1 publication Critical patent/DE2558017A1/de
Application granted granted Critical
Publication of DE2558017C2 publication Critical patent/DE2558017C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088—Transistor-transistor logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs
    • H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/67—Complementary BJTs
    • H10D84/673—Vertical complementary BJTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
DE2558017A 1974-12-23 1975-12-22 Schaltungsanordnung zur Durchführung Boolescher Verknüpfungen digitaler Signale Expired DE2558017C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/535,405 US3999080A (en) 1974-12-23 1974-12-23 Transistor coupled logic circuit

Publications (2)

Publication Number Publication Date
DE2558017A1 DE2558017A1 (de) 1976-07-01
DE2558017C2 true DE2558017C2 (de) 1985-02-14

Family

ID=24134040

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2558017A Expired DE2558017C2 (de) 1974-12-23 1975-12-22 Schaltungsanordnung zur Durchführung Boolescher Verknüpfungen digitaler Signale

Country Status (5)

Country Link
US (1) US3999080A (OSRAM)
JP (1) JPS51108564A (OSRAM)
DE (1) DE2558017C2 (OSRAM)
FR (1) FR2296312A1 (OSRAM)
GB (1) GB1525499A (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3739872A1 (de) * 1987-11-25 1989-06-08 Texas Instruments Deutschland Integrierte schaltung

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
JPS567464A (en) * 1979-06-29 1981-01-26 Hitachi Ltd Semiconductor integrated circuit device
US4339675A (en) * 1979-08-13 1982-07-13 Texas Instruments Incorporated Logic circuit having an improved disable circuit
US4330723A (en) * 1979-08-13 1982-05-18 Fairchild Camera And Instrument Corporation Transistor logic output device for diversion of Miller current
US4339676A (en) * 1979-08-13 1982-07-13 Texas Instruments Incorporated Logic circuit having a selectable output mode
US4413194A (en) * 1981-07-10 1983-11-01 Motorola, Inc. TTL Output circuit having means for preventing output voltage excursions induced by negative current reflections
JPS5830235A (ja) * 1981-08-18 1983-02-22 Fujitsu Ltd ゲ−トアレイ
US4415817A (en) * 1981-10-08 1983-11-15 Signetics Corporation Bipolar logic gate including circuitry to prevent turn-off and deep saturation of pull-down transistor
US4424455A (en) * 1982-04-22 1984-01-03 Motorola, Inc. Glitch eliminating data selector
JPS59181724A (ja) * 1983-03-31 1984-10-16 Fujitsu Ltd ゲ−トアレイｌｓｉ装置
US4542331A (en) * 1983-08-01 1985-09-17 Signetics Corporation Low-impedance voltage reference
US4583051A (en) * 1984-11-06 1986-04-15 Precision Monolithics, Inc. Extended range amplifier circuit
US4675552A (en) * 1985-02-11 1987-06-23 Harris Corporation Single input/multiple output logic interface circuit having minimized voltage swing
FR2589296B1 (fr) * 1985-10-29 1987-11-27 Thomson Csf Circuit de commande en parallele d'un grand nombre de cellules logiques de type stl
US4975603A (en) * 1986-07-02 1990-12-04 Texas Instruments Incorporated Method and circuitry for compensating for negative internal ground voltage glitches
US4920286A (en) * 1986-07-02 1990-04-24 Texas Instruments Incorporated Method and circuitry for compensating for negative internal ground voltage glitches
JPS6378617A (ja) * 1986-09-22 1988-04-08 Mitsubishi Electric Corp バイポ−ラ論理回路
US4893032A (en) * 1987-03-23 1990-01-09 International Business Machines Corp. Non-saturating temperature independent voltage output driver with adjustable down level
JPS63250217A (ja) * 1987-03-23 1988-10-18 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Ｔｔｌ駆動回路
US4868424A (en) * 1987-11-24 1989-09-19 Fairchild Semiconductor Corp. TTL circuit with increased transient drive
US4874970A (en) * 1988-05-11 1989-10-17 Applied Micro Circuits Corporation ECL output with Darlington or common collector-common emitter drive

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL282779A (OSRAM) * 1961-09-08
US3217181A (en) * 1962-09-11 1965-11-09 Rca Corp Logic switching circuit comprising a plurality of discrete inputs
US3394268A (en) * 1965-02-01 1968-07-23 Bell Telephone Labor Inc Logic switching circuit
US3515899A (en) * 1966-06-08 1970-06-02 Northern Electric Co Logic gate with stored charge carrier leakage path
US3544808A (en) * 1967-03-25 1970-12-01 Nippon Telegraph & Telephone High speed saturation mode switching circuit for a capacitive load
US3624620A (en) * 1969-06-23 1971-11-30 Honeywell Inc Memory address selection circuitry
BE778654A (fr) * 1971-04-05 1972-05-16 Burroughs Corp Circuit logique perfectionne

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3739872A1 (de) * 1987-11-25 1989-06-08 Texas Instruments Deutschland Integrierte schaltung

Also Published As

Publication number Publication date
DE2558017A1 (de) 1976-07-01
US3999080A (en) 1976-12-21
GB1525499A (en) 1978-09-20
JPS51108564A (OSRAM) 1976-09-25
FR2296312B1 (OSRAM) 1982-12-10
FR2296312A1 (fr) 1976-07-23

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition