DE2543138B2 - Decoder, bestehend aus einem monolithischen, maskenprogrammierbaren Halbleiter-Festwertspeicher - Google Patents

Decoder, bestehend aus einem monolithischen, maskenprogrammierbaren Halbleiter-Festwertspeicher

Info

Publication number
DE2543138B2
DE2543138B2 DE2543138A DE2543138A DE2543138B2 DE 2543138 B2 DE2543138 B2 DE 2543138B2 DE 2543138 A DE2543138 A DE 2543138A DE 2543138 A DE2543138 A DE 2543138A DE 2543138 B2 DE2543138 B2 DE 2543138B2
Authority
DE
Germany
Prior art keywords
source
substrate
regions
memory
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE2543138A
Other languages
German (de)
English (en)
Other versions
DE2543138A1 (de
DE2543138C3 (enrdf_load_stackoverflow
Inventor
Kenshi Yokohama Manabe
Yasoji Kanagawa Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of DE2543138A1 publication Critical patent/DE2543138A1/de
Publication of DE2543138B2 publication Critical patent/DE2543138B2/de
Application granted granted Critical
Publication of DE2543138C3 publication Critical patent/DE2543138C3/de
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • H10B20/27ROM only
    • H10B20/30ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/36Gate programmed, e.g. different gate material or no gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • H10B20/27ROM only
    • H10B20/30ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38Doping programmed, e.g. mask ROM
    • H10B20/387Source region or drain region doping programmed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE2543138A 1974-09-26 1975-09-26 Decoder, bestehend aus einem monolithischen, maskenprogrammierbaren Halbleiter-Festwertspeicher Granted DE2543138B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49110032A JPS605062B2 (ja) 1974-09-26 1974-09-26 半導体論理回路装置

Publications (3)

Publication Number Publication Date
DE2543138A1 DE2543138A1 (de) 1976-04-29
DE2543138B2 true DE2543138B2 (de) 1978-05-11
DE2543138C3 DE2543138C3 (enrdf_load_stackoverflow) 1979-01-25

Family

ID=14525370

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2543138A Granted DE2543138B2 (de) 1974-09-26 1975-09-26 Decoder, bestehend aus einem monolithischen, maskenprogrammierbaren Halbleiter-Festwertspeicher

Country Status (4)

Country Link
JP (1) JPS605062B2 (enrdf_load_stackoverflow)
DE (1) DE2543138B2 (enrdf_load_stackoverflow)
FR (1) FR2286471A1 (enrdf_load_stackoverflow)
GB (1) GB1499389A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4061506A (en) * 1975-05-01 1977-12-06 Texas Instruments Incorporated Correcting doping defects
JPS54121685A (en) * 1978-03-14 1979-09-20 Kyushu Nippon Electric Ic and method of fabricating same
JPH0626246B2 (ja) * 1983-06-17 1994-04-06 株式会社日立製作所 半導体メモリの製造方法
JPS5910261A (ja) * 1983-06-24 1984-01-19 Toshiba Corp 半導体論理回路装置
JPS6149975U (enrdf_load_stackoverflow) * 1984-09-05 1986-04-03
FR2826169A1 (fr) 2001-06-15 2002-12-20 St Microelectronics Sa Memoire mos a lecture seulement
DE102019128071B3 (de) * 2019-10-17 2021-02-04 Infineon Technologies Ag Transistorbauelement

Also Published As

Publication number Publication date
JPS5137578A (enrdf_load_stackoverflow) 1976-03-29
DE2543138A1 (de) 1976-04-29
DE2543138C3 (enrdf_load_stackoverflow) 1979-01-25
JPS605062B2 (ja) 1985-02-08
FR2286471B1 (enrdf_load_stackoverflow) 1981-10-30
FR2286471A1 (fr) 1976-04-23
GB1499389A (en) 1978-02-01

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Free format text: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZEL, W., DIPL.-ING., PAT.-ANW., 8000 MUENCHEN

8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP