DE2346934A1 - Digitaler phasenregelkreis - Google Patents

Digitaler phasenregelkreis

Info

Publication number
DE2346934A1
DE2346934A1 DE19732346934 DE2346934A DE2346934A1 DE 2346934 A1 DE2346934 A1 DE 2346934A1 DE 19732346934 DE19732346934 DE 19732346934 DE 2346934 A DE2346934 A DE 2346934A DE 2346934 A1 DE2346934 A1 DE 2346934A1
Authority
DE
Germany
Prior art keywords
counter
value
final value
pulses
locked loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19732346934
Other languages
German (de)
English (en)
Inventor
Josef Kellner
Hans Dipl Ing Kowalczyk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE19732346934 priority Critical patent/DE2346934A1/de
Priority to US502510A priority patent/US3893170A/en
Priority to FR7430845A priority patent/FR2244305B3/fr
Priority to IT27341/74A priority patent/IT1021424B/it
Priority to NL7412357A priority patent/NL7412357A/xx
Priority to BE148659A priority patent/BE820065A/fr
Publication of DE2346934A1 publication Critical patent/DE2346934A1/de
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • G11B20/1403Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE19732346934 1973-09-18 1973-09-18 Digitaler phasenregelkreis Pending DE2346934A1 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE19732346934 DE2346934A1 (de) 1973-09-18 1973-09-18 Digitaler phasenregelkreis
US502510A US3893170A (en) 1973-09-18 1974-09-03 Digital phase control circuit
FR7430845A FR2244305B3 (fr) 1973-09-18 1974-09-12
IT27341/74A IT1021424B (it) 1973-09-18 1974-09-17 Circuito regolatore di fase digitale
NL7412357A NL7412357A (nl) 1973-09-18 1974-09-18 Digitale faseregelschakeling.
BE148659A BE820065A (fr) 1973-09-18 1974-09-18 Circuit numerique de regulation de phase

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732346934 DE2346934A1 (de) 1973-09-18 1973-09-18 Digitaler phasenregelkreis

Publications (1)

Publication Number Publication Date
DE2346934A1 true DE2346934A1 (de) 1975-04-03

Family

ID=5892944

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19732346934 Pending DE2346934A1 (de) 1973-09-18 1973-09-18 Digitaler phasenregelkreis

Country Status (6)

Country Link
US (1) US3893170A (fr)
BE (1) BE820065A (fr)
DE (1) DE2346934A1 (fr)
FR (1) FR2244305B3 (fr)
IT (1) IT1021424B (fr)
NL (1) NL7412357A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2717989A1 (de) * 1976-09-20 1978-03-23 Cii Honeywell Bull Verfahren und einrichtung zum lesen von adressen auf einem magnetischen aufzeichnungstraeger

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4158436A (en) * 1977-07-25 1979-06-19 Amp Incorporated Variable timing circuit for card readers and the like
JPS5813046A (ja) * 1981-07-17 1983-01-25 Victor Co Of Japan Ltd デ−タ読み取り回路
DE3322623A1 (de) * 1983-06-23 1985-01-03 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum wiedergewinnen von in binaeren datensignalen enthaltenden daten

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3631424A (en) * 1969-07-22 1971-12-28 Honeywell Inc Binary data detecting apparatus responsive to the change in sign of the slope of a waveform
BE790688A (fr) * 1971-10-27 1973-04-27 Xerox Corp Dispositif pour reproduire des bits de donnees enregistrees surun milieu d'enregistrement magnetique
US3736582A (en) * 1972-03-20 1973-05-29 Leach Corp Galloping base line compensating circuit
US3795903A (en) * 1972-09-29 1974-03-05 Ibm Modified phase encoding

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2717989A1 (de) * 1976-09-20 1978-03-23 Cii Honeywell Bull Verfahren und einrichtung zum lesen von adressen auf einem magnetischen aufzeichnungstraeger

Also Published As

Publication number Publication date
FR2244305A1 (fr) 1975-04-11
FR2244305B3 (fr) 1977-06-17
NL7412357A (nl) 1975-03-20
IT1021424B (it) 1978-01-30
US3893170A (en) 1975-07-01
BE820065A (fr) 1975-03-18

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