DE2334258A1 - Verfahren zum dotieren von halbleitermaterialien - Google Patents

Verfahren zum dotieren von halbleitermaterialien

Info

Publication number
DE2334258A1
DE2334258A1 DE19732334258 DE2334258A DE2334258A1 DE 2334258 A1 DE2334258 A1 DE 2334258A1 DE 19732334258 DE19732334258 DE 19732334258 DE 2334258 A DE2334258 A DE 2334258A DE 2334258 A1 DE2334258 A1 DE 2334258A1
Authority
DE
Germany
Prior art keywords
layer
doped
oxide layer
diffusion
doping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19732334258
Other languages
German (de)
English (en)
Inventor
Robert Guy Hays
Ronald Charles Pennell
Edwin Emett Reed
Charles Edward Volk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE2334258A1 publication Critical patent/DE2334258A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/078—Impurity redistribution by oxidation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/118—Oxide films
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/92—Controlling diffusion profile by oxidation

Landscapes

  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Weting (AREA)
DE19732334258 1972-07-05 1973-07-05 Verfahren zum dotieren von halbleitermaterialien Pending DE2334258A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00268987A US3808060A (en) 1972-07-05 1972-07-05 Method of doping semiconductor substrates

Publications (1)

Publication Number Publication Date
DE2334258A1 true DE2334258A1 (de) 1974-01-24

Family

ID=23025369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19732334258 Pending DE2334258A1 (de) 1972-07-05 1973-07-05 Verfahren zum dotieren von halbleitermaterialien

Country Status (4)

Country Link
US (1) US3808060A (cg-RX-API-DMAC10.html)
JP (1) JPS4965182A (cg-RX-API-DMAC10.html)
DE (1) DE2334258A1 (cg-RX-API-DMAC10.html)
FR (1) FR2191273A1 (cg-RX-API-DMAC10.html)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4974880A (cg-RX-API-DMAC10.html) * 1972-11-20 1974-07-19
US4006046A (en) * 1975-04-21 1977-02-01 Trw Inc. Method for compensating for emitter-push effect in the fabrication of transistors
US4102715A (en) * 1975-12-19 1978-07-25 Matsushita Electric Industrial Co., Ltd. Method for diffusing an impurity into a semiconductor body
JPS52153373A (en) * 1976-06-15 1977-12-20 Toshiba Corp Preparation of semiconductor device
US4217375A (en) * 1977-08-30 1980-08-12 Bell Telephone Laboratories, Incorporated Deposition of doped silicon oxide films
JPS5635464A (en) * 1979-08-30 1981-04-08 Toshiba Corp Formation of npn type transistor
JPS59500296A (ja) * 1982-02-26 1984-02-23 ウエスタ−ン エレクトリツク カムパニ−,インコ−ポレ−テツド 半導体デバイスの製造方法
US4472212A (en) * 1982-02-26 1984-09-18 At&T Bell Laboratories Method for fabricating a semiconductor device
CA1198226A (en) * 1982-06-01 1985-12-17 Eliezer Kinsbron Method for manufacturing a semiconductor device
US4471524A (en) * 1982-06-01 1984-09-18 At&T Bell Laboratories Method for manufacturing an insulated gate field effect transistor device
JPH0397224A (ja) * 1989-09-11 1991-04-23 Toshiba Corp 半導体装置の製造方法
US5494852A (en) * 1993-07-28 1996-02-27 Sony Electronics Inc. High capacity semiconductor dopant deposition/oxidization process using a single furnace cycle
US5792280A (en) * 1994-05-09 1998-08-11 Sandia Corporation Method for fabricating silicon cells
US6057216A (en) * 1997-12-09 2000-05-02 International Business Machines Corporation Low temperature diffusion process for dopant concentration enhancement
JP4870908B2 (ja) * 2004-01-23 2012-02-08 エルピーダメモリ株式会社 半導体装置の製造方法
KR100666564B1 (ko) * 2004-08-04 2007-01-09 삼성에스디아이 주식회사 박막트랜지스터의 제조 방법
TWI501292B (zh) * 2012-09-26 2015-09-21 財團法人工業技術研究院 形成圖案化摻雜區的方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3575742A (en) * 1964-11-09 1971-04-20 Solitron Devices Method of making a semiconductor device
US3450961A (en) * 1966-05-26 1969-06-17 Westinghouse Electric Corp Semiconductor devices with a region having portions of differing depth and concentration
US3489622A (en) * 1967-05-18 1970-01-13 Ibm Method of making high frequency transistors
JPS5415663B2 (cg-RX-API-DMAC10.html) * 1971-12-29 1979-06-16
JPS495595A (cg-RX-API-DMAC10.html) * 1972-05-02 1974-01-18
JPS551687B2 (cg-RX-API-DMAC10.html) * 1972-07-06 1980-01-16

Also Published As

Publication number Publication date
JPS4965182A (cg-RX-API-DMAC10.html) 1974-06-24
US3808060A (en) 1974-04-30
FR2191273A1 (cg-RX-API-DMAC10.html) 1974-02-01

Similar Documents

Publication Publication Date Title
DE3123231C2 (cg-RX-API-DMAC10.html)
DE2812658C3 (de) Verfahren zum selektiven Diffundieren von Aluminium in ein Einkristall-Siliciumhalbleitersubstrat
DE2823967C2 (cg-RX-API-DMAC10.html)
CH615781A5 (cg-RX-API-DMAC10.html)
DE1950069B2 (de) Verfahren zum Herstellung einer Halbleiteranordnung
DE4420052A1 (de) Verfahren zur Herstellung eines Gates in einer Halbleitereinrichtung
DE2500728A1 (de) Verfahren zur verbesserung der dotierung eines halbleitermaterials
DE102008039058A1 (de) Halbleiterwafer für Halbleiterbauelemente und Verfahren zur Herstellung derselben
DE1901819A1 (de) Polykristalline Halbleiteranordnung
DE2942236C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2617293B2 (de) Verfahren zur Herstellung eines Halbleiterbauelements
DE2611559B2 (de) Verfahren zur Herstellung von Halbleiterstrukturen
DE2752335C3 (de) Verfahren zur Herstellung eines Sperrschicht-Feldeffekttransistors mit einem vertikalen Kanal
DE2014797B2 (de) Verfahren zum Herstellen von Halbleiterschaltelementen jn einer integrierten Halbleiterschaltung
DE2154386B2 (de) Verfahren zum Herstellen einer epitaktischen Halbleiterschicht auf einem Halbleitersubstrat durch Abscheiden aus einem Reaktionsgas/Trägergas-Gemisch
DE2219696C3 (de) Verfarhen zum Herstellen einer monolithisch integrierten Halbleiteranordnung
DE2148431C3 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
DE3147535C2 (cg-RX-API-DMAC10.html)
DE1564086B2 (de) Verfahren zum herstellen eines halbleitersystems
DE2439535A1 (de) Verfahren zum eindiffundieren aktiver stoerelemente in halbleitermaterialien
DE69821560T2 (de) Epitaxieverfahren auf einem Siliciumsubstrat mit durch Arsen hochdotierten Gebieten
DE1916969B2 (de) Verfahren zur herstellung eines integrierten widerstandes
DE2732582C2 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE2059506C2 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE2130928A1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung