DE2262297C2 - Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau - Google Patents

Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau

Info

Publication number
DE2262297C2
DE2262297C2 DE2262297A DE2262297A DE2262297C2 DE 2262297 C2 DE2262297 C2 DE 2262297C2 DE 2262297 A DE2262297 A DE 2262297A DE 2262297 A DE2262297 A DE 2262297A DE 2262297 C2 DE2262297 C2 DE 2262297C2
Authority
DE
Germany
Prior art keywords
transistor
collector
base
semiconductor
schottky
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2262297A
Other languages
German (de)
English (en)
Other versions
DE2262297A1 (de
Inventor
Horst Heinz Dipl.-Ing. Dr. 7032 Sindelfingen Berger
Siegfried K. Dipl.-Ing. Dr. 7000 Stuttgart Wiedmann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
Original Assignee
IBM Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH filed Critical IBM Deutschland GmbH
Priority to DE2262297A priority Critical patent/DE2262297C2/de
Priority claimed from DE2262397A external-priority patent/DE2262397A1/de
Priority to FR7342454A priority patent/FR2211751B1/fr
Priority to GB5451273A priority patent/GB1402809A/en
Priority to US419581A priority patent/US3922565A/en
Priority to JP48141931A priority patent/JPS5218089B2/ja
Publication of DE2262297A1 publication Critical patent/DE2262297A1/de
Application granted granted Critical
Publication of DE2262297C2 publication Critical patent/DE2262297C2/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/013Modifications for accelerating switching in bipolar transistor circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233Integrated injection logic structures [I2L]
    • H01L27/0237Integrated injection logic structures [I2L] using vertical injector structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688Integrated circuits having a three-dimensional layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0744Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
    • H01L27/075Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
    • H01L27/0755Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H01L27/0761Vertical bipolar transistor in combination with diodes only
    • H01L27/0766Vertical bipolar transistor in combination with diodes only with Schottky diodes only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/087I2L integrated injection logic
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/096Lateral transistor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/117Oxidation, selective

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
DE2262297A 1972-12-20 1972-12-20 Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau Expired DE2262297C2 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE2262297A DE2262297C2 (de) 1972-12-20 1972-12-20 Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau
FR7342454A FR2211751B1 (US06262066-20010717-C00315.png) 1972-12-20 1973-11-20
GB5451273A GB1402809A (en) 1972-12-20 1973-11-23 Semiconductor circuit elements
US419581A US3922565A (en) 1972-12-20 1973-11-28 Monolithically integrable digital basic circuit
JP48141931A JPS5218089B2 (US06262066-20010717-C00315.png) 1972-12-20 1973-12-20

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2262397A DE2262397A1 (de) 1971-12-29 1972-12-20 Elektromagnetisch gesteuertes ventil fuer druckmittel
DE2262297A DE2262297C2 (de) 1972-12-20 1972-12-20 Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau

Publications (2)

Publication Number Publication Date
DE2262297A1 DE2262297A1 (de) 1974-06-27
DE2262297C2 true DE2262297C2 (de) 1985-11-28

Family

ID=25764261

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2262297A Expired DE2262297C2 (de) 1972-12-20 1972-12-20 Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau

Country Status (4)

Country Link
US (1) US3922565A (US06262066-20010717-C00315.png)
DE (1) DE2262297C2 (US06262066-20010717-C00315.png)
FR (1) FR2211751B1 (US06262066-20010717-C00315.png)
GB (1) GB1402809A (US06262066-20010717-C00315.png)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1507299A (en) * 1974-03-26 1978-04-12 Signetics Corp Integrated semiconductor devices
US4199775A (en) * 1974-09-03 1980-04-22 Bell Telephone Laboratories, Incorporated Integrated circuit and method for fabrication thereof
NL7413264A (nl) * 1974-10-09 1976-04-13 Philips Nv Geintegreerde schakeling.
JPS5615587B2 (US06262066-20010717-C00315.png) * 1974-12-27 1981-04-10
US4153487A (en) * 1974-12-27 1979-05-08 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing intergrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
JPS561783B2 (US06262066-20010717-C00315.png) * 1974-12-27 1981-01-16
US4151019A (en) * 1974-12-27 1979-04-24 Tokyo Shibaura Electric Co., Ltd. Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4058419A (en) * 1974-12-27 1977-11-15 Tokyo Shibaura Electric, Co., Ltd. Method of manufacturing integrated injection logic semiconductor devices utilizing self-aligned double-diffusion techniques
US4119998A (en) * 1974-12-27 1978-10-10 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic with both grid and internal double-diffused injectors
DE2509530C2 (de) * 1975-03-05 1985-05-23 Ibm Deutschland Gmbh, 7000 Stuttgart Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren
GB1558281A (en) * 1975-07-31 1979-12-19 Tokyo Shibaura Electric Co Semiconductor device and logic circuit constituted by the semiconductor device
DE2635800C2 (de) * 1975-08-09 1986-04-03 Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa Monolithisch integrierte Schottky-I↑2↑L-Gatterschaltung
US4071774A (en) * 1975-12-24 1978-01-31 Tokyo Shibaura Electric Co., Ltd. Integrated injection logic with both fan in and fan out Schottky diodes, serially connected between stages
DE2624409C2 (de) * 1976-05-31 1987-02-12 Siemens AG, 1000 Berlin und 8000 München Schottky-Transistor-Logik-Anordnung
GB1580977A (en) * 1976-05-31 1980-12-10 Siemens Ag Schottkytransisitor-logic arrangements
DE2624339C2 (de) * 1976-05-31 1986-09-11 Siemens AG, 1000 Berlin und 8000 München Schottky-Transistorlogik
FR2356314A1 (fr) * 1976-06-22 1978-01-20 Radiotechnique Compelec Circuit integre logique a effet de seuil avec hysteresis
JPS5317081A (en) * 1976-07-30 1978-02-16 Sharp Corp Production of i2l device
US4087900A (en) * 1976-10-18 1978-05-09 Bell Telephone Laboratories, Incorporated Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions
US4101349A (en) * 1976-10-29 1978-07-18 Hughes Aircraft Company Integrated injection logic structure fabricated by outdiffusion and epitaxial deposition
SE405925B (sv) * 1976-11-02 1979-01-08 Ericsson Telefon Ab L M Elektronisk koordinatveljare framstelld i monolitutforande
US4067038A (en) * 1976-12-22 1978-01-03 Harris Corporation Substrate fed logic and method of fabrication
US4132573A (en) * 1977-02-08 1979-01-02 Murata Manufacturing Co., Ltd. Method of manufacturing a monolithic integrated circuit utilizing epitaxial deposition and simultaneous outdiffusion
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
US4240846A (en) * 1978-06-27 1980-12-23 Harris Corporation Method of fabricating up diffused substrate FED logic utilizing a two-step epitaxial deposition
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
US4322883A (en) * 1980-07-08 1982-04-06 International Business Machines Corporation Self-aligned metal process for integrated injection logic integrated circuits
US4543595A (en) * 1982-05-20 1985-09-24 Fairchild Camera And Instrument Corporation Bipolar memory cell
US5166094A (en) * 1984-09-14 1992-11-24 Fairchild Camera & Instrument Corp. Method of fabricating a base-coupled transistor logic
US5021856A (en) * 1989-03-15 1991-06-04 Plessey Overseas Limited Universal cell for bipolar NPN and PNP transistors and resistive elements

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3209214A (en) * 1961-09-25 1965-09-28 Westinghouse Electric Corp Monolithic universal logic element
US3136897A (en) * 1961-09-25 1964-06-09 Westinghouse Electric Corp Monolithic semiconductor structure comprising at least one junction transistor and associated diodes to form logic element
US3302079A (en) * 1964-11-05 1967-01-31 Westinghouse Electric Corp Digital uniblock gate structure
US3564443A (en) * 1966-06-29 1971-02-16 Hitachi Ltd Semiconductor integrated circuit device containing lateral and planar transistor in a semiconductor layer
US3575646A (en) * 1966-09-23 1971-04-20 Westinghouse Electric Corp Integrated circuit structures including controlled rectifiers
US3585412A (en) * 1968-08-27 1971-06-15 Bell Telephone Labor Inc Schottky barrier diodes as impedance elements
US3573573A (en) * 1968-12-23 1971-04-06 Ibm Memory cell with buried load impedances
US3571674A (en) * 1969-01-10 1971-03-23 Fairchild Camera Instr Co Fast switching pnp transistor
US3623925A (en) * 1969-01-10 1971-11-30 Fairchild Camera Instr Co Schottky-barrier diode process and devices
US3611067A (en) * 1970-04-20 1971-10-05 Fairchild Camera Instr Co Complementary npn/pnp structure for monolithic integrated circuits
US3657612A (en) * 1970-04-20 1972-04-18 Ibm Inverse transistor with high current gain
DE2021824C3 (de) * 1970-05-05 1980-08-14 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithische Halbleiterschaltung
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
US3751680A (en) * 1972-03-02 1973-08-07 Signetics Corp Double-clamped schottky transistor logic gate circuit
DE2212168C2 (de) * 1972-03-14 1982-10-21 Ibm Deutschland Gmbh, 7000 Stuttgart Monolithisch integrierte Halbleiteranordnung

Also Published As

Publication number Publication date
FR2211751B1 (US06262066-20010717-C00315.png) 1977-09-30
GB1402809A (en) 1975-08-13
DE2262297A1 (de) 1974-06-27
FR2211751A1 (US06262066-20010717-C00315.png) 1974-07-19
US3922565A (en) 1975-11-25

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee