DE2262024A1 - Verfahren zur herstellung von halbleiterbauelementen bzw. halbleiterschaltungen - Google Patents

Verfahren zur herstellung von halbleiterbauelementen bzw. halbleiterschaltungen

Info

Publication number
DE2262024A1
DE2262024A1 DE19722262024 DE2262024A DE2262024A1 DE 2262024 A1 DE2262024 A1 DE 2262024A1 DE 19722262024 DE19722262024 DE 19722262024 DE 2262024 A DE2262024 A DE 2262024A DE 2262024 A1 DE2262024 A1 DE 2262024A1
Authority
DE
Germany
Prior art keywords
semiconductor
zone
zones
diffusion
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19722262024
Other languages
German (de)
English (en)
Inventor
Junghi Ahn
William S Johnson
Jun Walter J Kleinfelder
Dewitt David Poughkeepsie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2262024A1 publication Critical patent/DE2262024A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3171—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation for ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
    • H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615—Combinations of vertical BJTs and one or more of resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/128—Proton bombardment of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/912—Displacing pn junction

Landscapes

  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE19722262024 1971-12-21 1972-12-19 Verfahren zur herstellung von halbleiterbauelementen bzw. halbleiterschaltungen Withdrawn DE2262024A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US21046471A 1971-12-21 1971-12-21

Publications (1)

Publication Number Publication Date
DE2262024A1 true DE2262024A1 (de) 1973-07-05

Family

ID=22783005

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722262024 Withdrawn DE2262024A1 (de) 1971-12-21 1972-12-19 Verfahren zur herstellung von halbleiterbauelementen bzw. halbleiterschaltungen

Country Status (7)

Country Link
US (1) US3756862A (cg-RX-API-DMAC10.html)
JP (2) JPS5224387B2 (cg-RX-API-DMAC10.html)
CA (1) CA974661A (cg-RX-API-DMAC10.html)
DE (1) DE2262024A1 (cg-RX-API-DMAC10.html)
FR (1) FR2164606B1 (cg-RX-API-DMAC10.html)
GB (1) GB1415500A (cg-RX-API-DMAC10.html)
IT (1) IT974717B (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG115526A1 (en) * 2002-04-19 2005-10-28 Sumitomo Chemical Co Thin-film semiconductor epitaxial substrate and process for production thereof

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1420065A (en) * 1972-01-31 1976-01-07 Mullard Ltd Methods of manufacturing semiconductor bodies
JPS555690B2 (cg-RX-API-DMAC10.html) * 1972-05-22 1980-02-08
JPS4951879A (cg-RX-API-DMAC10.html) * 1972-09-20 1974-05-20
US3855009A (en) * 1973-09-20 1974-12-17 Texas Instruments Inc Ion-implantation and conventional epitaxy to produce dielectrically isolated silicon layers
FR2257998B1 (cg-RX-API-DMAC10.html) * 1974-01-10 1976-11-26 Commissariat Energie Atomique
GB1447723A (en) * 1974-02-08 1976-08-25 Post Office Semiconductor devices
US3912546A (en) * 1974-12-06 1975-10-14 Hughes Aircraft Co Enhancement mode, Schottky-barrier gate gallium arsenide field effect transistor
DE2507613C3 (de) * 1975-02-21 1979-07-05 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung eines invers betriebenen Transistors
US3982967A (en) * 1975-03-26 1976-09-28 Ibm Corporation Method of proton-enhanced diffusion for simultaneously forming integrated circuit regions of varying depths
US3999097A (en) * 1975-06-30 1976-12-21 International Business Machines Corporation Ion implantation apparatus utilizing multiple aperture source plate and single aperture accel-decel system
US4025364A (en) * 1975-08-11 1977-05-24 Fairchild Camera And Instrument Corporation Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases
US4013891A (en) * 1975-12-15 1977-03-22 Ibm Corporation Method for varying the diameter of a beam of charged particles
US4157268A (en) * 1977-06-16 1979-06-05 International Business Machines Corporation Localized oxidation enhancement for an integrated injection logic circuit
US4133701A (en) * 1977-06-29 1979-01-09 General Motors Corporation Selective enhancement of phosphorus diffusion by implanting halogen ions
US4149084A (en) * 1977-11-01 1979-04-10 International Business Machines Corporation Apparatus for maintaining ion bombardment beam under improved vacuum condition
GB2038548B (en) * 1978-10-27 1983-03-23 Nippon Telegraph & Telephone Isolating semiconductor device by porous silicon oxide
US4383180A (en) * 1981-05-18 1983-05-10 Varian Associates, Inc. Particle beam accelerator
US4391651A (en) * 1981-10-15 1983-07-05 The United States Of America As Represented By The Secretary Of The Navy Method of forming a hyperabrupt interface in a GaAs substrate
US5182626A (en) * 1989-09-20 1993-01-26 Mitsubishi Denki Kabushiki Kaisha Insulated gate bipolar transistor and method of manufacturing the same
JP5358189B2 (ja) * 2006-01-20 2013-12-04 インフィネオン テクノロジーズ オーストリア アクチエンゲゼルシャフト 酸素含有半導体ウェハの処理方法
KR101012241B1 (ko) * 2008-09-24 2011-02-08 주식회사 동부하이텍 반도체 소자의 실리사이드 형성 방법
US10644127B2 (en) 2017-07-28 2020-05-05 Semiconductor Components Industries, Llc Process of forming an electronic device including a transistor structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG115526A1 (en) * 2002-04-19 2005-10-28 Sumitomo Chemical Co Thin-film semiconductor epitaxial substrate and process for production thereof

Also Published As

Publication number Publication date
JPS52129284A (en) 1977-10-29
GB1415500A (en) 1975-11-26
JPS5224387B2 (cg-RX-API-DMAC10.html) 1977-06-30
FR2164606B1 (cg-RX-API-DMAC10.html) 1974-08-02
US3756862A (en) 1973-09-04
JPS4871564A (cg-RX-API-DMAC10.html) 1973-09-27
FR2164606A1 (cg-RX-API-DMAC10.html) 1973-08-03
IT974717B (it) 1974-07-10
CA974661A (en) 1975-09-16

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