DE2207948A1 - Anschlußleiter für integrierte Schaltkreis-Bausteine und Verfahren zur Herstellung eines Gestells dieser Leiter - Google Patents

Anschlußleiter für integrierte Schaltkreis-Bausteine und Verfahren zur Herstellung eines Gestells dieser Leiter

Info

Publication number
DE2207948A1
DE2207948A1 DE19722207948 DE2207948A DE2207948A1 DE 2207948 A1 DE2207948 A1 DE 2207948A1 DE 19722207948 DE19722207948 DE 19722207948 DE 2207948 A DE2207948 A DE 2207948A DE 2207948 A1 DE2207948 A1 DE 2207948A1
Authority
DE
Germany
Prior art keywords
feet
plate
frame
photographic
chemical attack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19722207948
Other languages
German (de)
English (en)
Inventor
Claudio Dipl.-Phys. Ivrea Turin Dalmasso (Italien)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olivetti SpA
Original Assignee
Olivetti SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olivetti SpA filed Critical Olivetti SpA
Publication of DE2207948A1 publication Critical patent/DE2207948A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/468—Circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3405—Edge mounted components, e.g. terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
DE19722207948 1971-02-16 1972-02-16 Anschlußleiter für integrierte Schaltkreis-Bausteine und Verfahren zur Herstellung eines Gestells dieser Leiter Pending DE2207948A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT6751471 1971-02-16

Publications (1)

Publication Number Publication Date
DE2207948A1 true DE2207948A1 (de) 1972-10-05

Family

ID=11303054

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722207948 Pending DE2207948A1 (de) 1971-02-16 1972-02-16 Anschlußleiter für integrierte Schaltkreis-Bausteine und Verfahren zur Herstellung eines Gestells dieser Leiter

Country Status (4)

Country Link
US (1) US3808679A (OSRAM)
DE (1) DE2207948A1 (OSRAM)
FR (1) FR2125482B1 (OSRAM)
GB (1) GB1347422A (OSRAM)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3960561A (en) * 1975-04-10 1976-06-01 International Business Machines Corporation Method for making electrical lead frame devices
US4085502A (en) * 1977-04-12 1978-04-25 Advanced Circuit Technology, Inc. Jumper cable
US4423435A (en) * 1980-10-27 1983-12-27 Texas Instruments Incorporated Assembly of an electronic device on an insulative substrate

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2912312A (en) * 1956-10-10 1959-11-10 Cleveland Metal Specialties Co Method of making components for printed circuits
US3405224A (en) * 1966-04-20 1968-10-08 Nippon Electric Co Sealed enclosure for electronic device
US3440027A (en) * 1966-06-22 1969-04-22 Frances Hugle Automated packaging of semiconductors
US3627901A (en) * 1969-12-19 1971-12-14 Texas Instruments Inc Composite electronic device package-connector unit

Also Published As

Publication number Publication date
FR2125482A1 (OSRAM) 1972-09-29
FR2125482B1 (OSRAM) 1977-12-23
GB1347422A (en) 1974-02-27
US3808679A (en) 1974-05-07

Similar Documents

Publication Publication Date Title
DE2847356C2 (de) Verfahren zur Herstellung einer gedruckten Schaltung mit Widerstandselementen
DE60037168T2 (de) Dünne Struktur mit integriertem Widerstand/Kondensator/Induktor und Verfahren zu deren Herstellung
DE2554691C2 (de) Verfahren zum Herstellen elektrischer Leiter auf einem isolierenden Substrat und danach hergestellte Dünnschichtschaltung
DE1930669C2 (de) Verfahren zur Herstellung einer integrierten Halbleiterschaltung
DE1817434C3 (de) Verfahren zur Herstellung einer elektrischen Leitungsanordnung
DE2810054A1 (de) Elektronische schaltungsvorrichtung und verfahren zu deren herstellung
DE1271235B (de) Verfahren zur Herstellung von leitenden Verbindungen zwischen den leitenden Schichten einer elektrischen Schaltungsplatte
DE1266406B (de) Verfahren zum Herstellen mechanisch halternder und elektrisch leitender Anschluesse an kleinen Plaettchen, insbesondere an Halbleiterplaettchen
DE2401333A1 (de) Verfahren zur herstellung von isolierfilmen auf verbindungsschichten
DE2313106A1 (de) Verfahren zum herstellen eines elektrischen verbindungssystems
DE1180067B (de) Verfahren zum gleichzeitigen Kontaktieren mehrerer Halbleiteranordnungen
DE1589076C3 (de) Verfahren zum Herstellen von Halbleiteranordnungen mit tragfähigen elektrischen Leitern
DE69105070T2 (de) Verfahren zum Herstellen eines isolierenden Substrats für Halbleiterbauelemente und eine dazu verwendete, mit einem Muster versehene, Metallplatte.
DE1521770B2 (de) Verfahren zur herstellung von gedruckten elektrischen schaltungsbauteilen durch aetzen
DE69113292T2 (de) Verfahren zur Herstellung eines Farbfilters für einen Flüssigkristallfarbdisplay.
DE2251829A1 (de) Verfahren zur herstellung metallisierter platten
DE3445690A1 (de) Verfahren zur herstellung eines substrates mit einem oder mehreren durchgehenden loechern
DE1123723B (de) Verfahren zum Herstellen gedruckter Schaltungen
DE1199344B (de) Verfahren zur Herstellung einer gedruckten Schaltungsplatte
DE2926516A1 (de) Verfahren zur herstellung eines metallfolienwiderstandes und metallfolienwiderstand
EP0193128A2 (de) Filmmontierter Schaltkreis und Verfahren zu seiner Herstellung
DE69507924T2 (de) Herstellungsverfahren für eine anordnung, wobei ein längsträger mit leiterbahnen zur elektrischen kontaktierung eines halbleiterelements versehen ist
DE1765884A1 (de) Schaltungen mit duennen Filmen
DE1546014A1 (de) Verfahren zum AEtzen von Metallschichten mit laengs der Schichtdicke unterschiedlicher Zusammensetzung
DE3622223A1 (de) Verfahren zum herstellen eines elektronischen netzwerkbausteins

Legal Events

Date Code Title Description
OHA Expiration of time for request for examination