DE2159672A1 - Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer Trägerplatte hierfür - Google Patents

Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer Trägerplatte hierfür

Info

Publication number
DE2159672A1
DE2159672A1 DE19712159672 DE2159672A DE2159672A1 DE 2159672 A1 DE2159672 A1 DE 2159672A1 DE 19712159672 DE19712159672 DE 19712159672 DE 2159672 A DE2159672 A DE 2159672A DE 2159672 A1 DE2159672 A1 DE 2159672A1
Authority
DE
Germany
Prior art keywords
plate
cutout
core
carrier plate
circuit arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19712159672
Other languages
German (de)
English (en)
Inventor
William Sherman Oaks; Jackson Charles Alexis Thousand Oaks; Paterson Paul Gordon Canoga Park; Calif. Griff (V.StA.). H05k 3-00
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bunker Ramo Corp
Original Assignee
Bunker Ramo Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bunker Ramo Corp filed Critical Bunker Ramo Corp
Publication of DE2159672A1 publication Critical patent/DE2159672A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0323—Working metal substrate or core, e.g. by etching, deforming
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
DE19712159672 1970-12-11 1971-12-01 Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer Trägerplatte hierfür Pending DE2159672A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US9720470A 1970-12-11 1970-12-11

Publications (1)

Publication Number Publication Date
DE2159672A1 true DE2159672A1 (de) 1972-06-29

Family

ID=22262026

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19712159672 Pending DE2159672A1 (de) 1970-12-11 1971-12-01 Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer Trägerplatte hierfür

Country Status (8)

Country Link
CA (1) CA954634A (enExample)
CH (1) CH536589A (enExample)
DE (1) DE2159672A1 (enExample)
FR (1) FR2117644A5 (enExample)
GB (1) GB1348015A (enExample)
IT (1) IT943856B (enExample)
NL (1) NL7116703A (enExample)
ZA (1) ZA717709B (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4606787A (en) * 1982-03-04 1986-08-19 Etd Technology, Inc. Method and apparatus for manufacturing multi layer printed circuit boards

Also Published As

Publication number Publication date
FR2117644A5 (enExample) 1972-07-21
CH536589A (de) 1973-04-30
IT943856B (it) 1973-04-10
NL7116703A (enExample) 1972-06-13
CA954634A (en) 1974-09-10
AU3581571A (en) 1973-05-24
GB1348015A (en) 1974-03-13
ZA717709B (en) 1972-08-30

Similar Documents

Publication Publication Date Title
DE69131107T2 (de) Herstellungsverfahren für einen Festelektrolytkondensator
DE60014648T2 (de) Festelektrolytkondensatoren und herstellungsverfahren
DE2129132A1 (de) Elektrische Schaltungsanordnung und Verfahren zu deren Herstellung
DE2927011A1 (de) Gekapselter kondensator und verfahren zu seiner herstellung
DE60019592T2 (de) Festelektrolytkondensatoren und herstellungsverfahren
DE2225825B2 (de) Verfahren zum Herstellen einer Anzahl plättchenförmiger Festkörper-Elektrolytkondensatoren
DE10296884B4 (de) Herstellung festkörperelektronischer Bauteile
DE102019219698B4 (de) Batteriepack und herstellungsverfahren für ein batteriepack
DE2728057A1 (de) Konfiguration des endanschlusses eines elektrolytkondensators
DE1861066U (de) Dreidimensional aufgebaute schaltungsanordnung mit blockfoermigen, in ein rahmengestell einschiebbaren schaltungsgruppen.
DE60032828T2 (de) Verfahren zu Herstellung eines Festelektrolytkondensators, und Vorrichtung zu seiner Herstellung
DE2816328A1 (de) Elektrische kontaktverbindung und verfahren zum herstellen derselben
DE2021943A1 (de) Elektrisches Bauteil mit planarer Anschlusselektrode
DE19714544B4 (de) Verfahren zum Anbringen eines Trockenelektrolytkondensators auf einer Leiterplatine und Anordnung des Kondensators und der Platine
DE2103064A1 (de) Vorrichtung zur Herstellung von Modulelementen
DE2632068A1 (de) Gehaeuseaufbau einer integrierbaren festkoerperschaltung
DE69330657T2 (de) Elektronische Schaltungsvorrichtung und Verfahren zur Herstellung
DE69525302T2 (de) Oberflächenmontierter Verbinder
DE4015463A1 (de) Verfahren zum anbringen von leitenden anschluessen an keramikkomponenten
DE112017006956T5 (de) Verfahren zur Herstellung einer Leistungshalbleitervorrichtung und Leistungshalbleitervorrichtung
DE1953359B2 (de) Elektrolytkondensator
DE69008833T2 (de) Festelektrolytkondensator und Verfahren zu seiner Herstellung.
DE3601681A1 (de) Entkopplungskondensator fuer schaltkreisbausteine mit rasterfoermigen kontaktstiftanordnungen und daraus bestehende entkopplungsanordnungen
DE2159672A1 (de) Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer Trägerplatte hierfür
DE3018846A1 (de) Elektronisches bauelement in chipform und verfahren zur herstellung desselben

Legal Events

Date Code Title Description
OHA Expiration of time for request for examination