DE2021843C2 - Halbleiter-Bauelement und Halbleiter-Platte mit mehreren solchen Halbleiter-Bauelementen - Google Patents
Halbleiter-Bauelement und Halbleiter-Platte mit mehreren solchen Halbleiter-BauelementenInfo
- Publication number
- DE2021843C2 DE2021843C2 DE2021843A DE2021843A DE2021843C2 DE 2021843 C2 DE2021843 C2 DE 2021843C2 DE 2021843 A DE2021843 A DE 2021843A DE 2021843 A DE2021843 A DE 2021843A DE 2021843 C2 DE2021843 C2 DE 2021843C2
- Authority
- DE
- Germany
- Prior art keywords
- zone
- semiconductor
- plate
- edge
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 111
- 230000007704 transition Effects 0.000 claims description 51
- 230000002093 peripheral effect Effects 0.000 claims description 25
- 239000013078 crystal Substances 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 230000001771 impaired effect Effects 0.000 claims description 2
- 239000011521 glass Substances 0.000 description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 16
- 239000000463 material Substances 0.000 description 16
- 238000002161 passivation Methods 0.000 description 13
- 239000003795 chemical substances by application Substances 0.000 description 12
- 230000008901 benefit Effects 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 230000006378 damage Effects 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 8
- 238000000926 separation method Methods 0.000 description 7
- 230000000903 blocking effect Effects 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 6
- 230000000873 masking effect Effects 0.000 description 6
- 235000012431 wafers Nutrition 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical group [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- VMXJCRHCUWKQCB-UHFFFAOYSA-N NPNP Chemical group NPNP VMXJCRHCUWKQCB-UHFFFAOYSA-N 0.000 description 1
- JCALBVZBIRXHMQ-UHFFFAOYSA-N [[hydroxy-(phosphonoamino)phosphoryl]amino]phosphonic acid Chemical compound OP(O)(=O)NP(O)(=O)NP(O)(O)=O JCALBVZBIRXHMQ-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000006735 deficit Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000004807 localization Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 231100000989 no adverse effect Toxicity 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
- H10D18/80—Bidirectional devices, e.g. triacs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3178—Coating or filling in grooves made in the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10157—Shape being other than a cuboid at the active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
- H01L2924/13033—TRIAC - Triode for Alternating Current - A bidirectional switching device containing two thyristor structures with common gate contact
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thyristors (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US82168469A | 1969-05-05 | 1969-05-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2021843A1 DE2021843A1 (de) | 1970-11-19 |
| DE2021843C2 true DE2021843C2 (de) | 1983-10-27 |
Family
ID=25234039
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2021843A Expired DE2021843C2 (de) | 1969-05-05 | 1970-05-05 | Halbleiter-Bauelement und Halbleiter-Platte mit mehreren solchen Halbleiter-Bauelementen |
| DE7016755U Expired DE7016755U (de) | 1969-05-05 | 1970-05-05 | Halbleiter-bauelement. |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE7016755U Expired DE7016755U (de) | 1969-05-05 | 1970-05-05 | Halbleiter-bauelement. |
Country Status (7)
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2306842C3 (de) * | 1973-02-12 | 1981-10-29 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum Herstellen einer Vielzahl von Halbleiterelementen aus einer einzigen Halbleiterscheibe |
| JPS5318380B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1974-06-05 | 1978-06-14 | ||
| US3997964A (en) * | 1974-09-30 | 1976-12-21 | General Electric Company | Premature breakage resistant semiconductor wafer and method for the manufacture thereof |
| GB1536545A (en) * | 1975-03-26 | 1978-12-20 | Mullard Ltd | Semiconductor device manufacture |
| JPS584815B2 (ja) * | 1976-04-27 | 1983-01-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
| JPS584814B2 (ja) * | 1976-04-27 | 1983-01-27 | 三菱電機株式会社 | 半導体装置 |
| DE2730130C2 (de) * | 1976-09-14 | 1987-11-12 | Mitsubishi Denki K.K., Tokyo | Verfahren zum Herstellen von Halbleiterbauelementen |
| DE2753207C2 (de) * | 1976-11-30 | 1989-10-12 | Mitsubishi Denki K.K., Tokio/Tokyo | Verfahren zum Herstellen von Halbleiterbauelementen |
| EP0017860A3 (en) * | 1979-04-11 | 1982-07-21 | Teccor Electronics, Inc. | Semiconductor switching device and method of making same |
| JPS56103447A (en) * | 1980-01-22 | 1981-08-18 | Toshiba Corp | Dicing method of semiconductor wafer |
| GB2071411B (en) | 1980-03-07 | 1983-12-21 | Philips Electronic Associated | Passivating p-n junction devices |
| IN154896B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1980-07-10 | 1984-12-22 | Westinghouse Electric Corp | |
| US4814296A (en) * | 1987-08-28 | 1989-03-21 | Xerox Corporation | Method of fabricating image sensor dies for use in assembling arrays |
| JPH06342902A (ja) * | 1993-06-01 | 1994-12-13 | Komatsu Ltd | 高耐圧半導体装置 |
| US5834829A (en) * | 1996-09-05 | 1998-11-10 | International Business Machines Corporation | Energy relieving crack stop |
| JP2002184952A (ja) | 2000-12-15 | 2002-06-28 | Shindengen Electric Mfg Co Ltd | 半導体装置、半導体装置の製造方法 |
| JP6111335B2 (ja) * | 2013-08-08 | 2017-04-05 | シャープ株式会社 | 半導体素子基板およびその製造方法 |
| JP6190740B2 (ja) * | 2014-03-11 | 2017-08-30 | 新電元工業株式会社 | 半導体装置及び半導体装置の製造方法 |
| US9852988B2 (en) * | 2015-12-18 | 2017-12-26 | Invensas Bonding Technologies, Inc. | Increased contact alignment tolerance for direct bonding |
| US10580735B2 (en) | 2016-10-07 | 2020-03-03 | Xcelsis Corporation | Stacked IC structure with system level wiring on multiple sides of the IC die |
| CN112071753A (zh) * | 2020-09-10 | 2020-12-11 | 深圳市槟城电子有限公司 | 一种电子元件的制备方法及电子元件 |
| CN118472048A (zh) * | 2024-07-12 | 2024-08-09 | 深圳长晶微电子有限公司 | 非对称台面的双向tvs器件及其制作方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1052447A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1962-09-15 | |||
| BE639633A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1962-11-07 | |||
| US3300694A (en) * | 1962-12-20 | 1967-01-24 | Westinghouse Electric Corp | Semiconductor controlled rectifier with firing pin portion on emitter |
| GB1052661A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1963-01-30 | 1900-01-01 | ||
| US3283224A (en) * | 1965-08-18 | 1966-11-01 | Trw Semiconductors Inc | Mold capping semiconductor device |
| CH426020A (de) * | 1965-09-08 | 1966-12-15 | Bbc Brown Boveri & Cie | Verfahren zur Herstellung des Halbleiterelementes eines stossspannungsfesten Halbleiterventils, sowie ein mit Hilfe dieses Verfahrens hergestelltes Halbleiterelement |
| US3492174A (en) * | 1966-03-19 | 1970-01-27 | Sony Corp | Method of making a semiconductor device |
-
1969
- 1969-05-05 US US821684A patent/US3628107A/en not_active Expired - Lifetime
-
1970
- 1970-05-04 GB GB21372/70A patent/GB1294184A/en not_active Expired
- 1970-05-05 IE IE585/70A patent/IE34135B1/xx unknown
- 1970-05-05 DE DE2021843A patent/DE2021843C2/de not_active Expired
- 1970-05-05 SE SE06200/70A patent/SE351521B/xx unknown
- 1970-05-05 DE DE7016755U patent/DE7016755U/de not_active Expired
- 1970-05-05 BE BE749969A patent/BE749969A/xx not_active IP Right Cessation
- 1970-05-06 JP JP45038547A patent/JPS5225713B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5225713B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-07-09 |
| GB1294184A (en) | 1972-10-25 |
| IE34135L (en) | 1970-11-05 |
| US3628107A (en) | 1971-12-14 |
| DE2021843A1 (de) | 1970-11-19 |
| SE351521B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1972-11-27 |
| IE34135B1 (en) | 1975-02-19 |
| BE749969A (fr) | 1970-10-16 |
| DE7016755U (de) | 1972-08-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8120 | Willingness to grant licences paragraph 23 | ||
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8328 | Change in the person/name/address of the agent |
Free format text: SCHUELER, H., DIPL.-CHEM. DR.RER.NAT., PAT.-ANW., 6000 FRANKFURT |