DE19912490C2 - Halbleitereinrichtung mit einer Schmelzschicht - Google Patents
Halbleitereinrichtung mit einer SchmelzschichtInfo
- Publication number
- DE19912490C2 DE19912490C2 DE19912490A DE19912490A DE19912490C2 DE 19912490 C2 DE19912490 C2 DE 19912490C2 DE 19912490 A DE19912490 A DE 19912490A DE 19912490 A DE19912490 A DE 19912490A DE 19912490 C2 DE19912490 C2 DE 19912490C2
- Authority
- DE
- Germany
- Prior art keywords
- layer
- melt
- melting
- pseudo
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
- H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17312098A JP4390297B2 (ja) | 1998-06-19 | 1998-06-19 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE19912490A1 DE19912490A1 (de) | 2000-01-20 |
| DE19912490C2 true DE19912490C2 (de) | 2003-10-16 |
Family
ID=15954519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19912490A Expired - Lifetime DE19912490C2 (de) | 1998-06-19 | 1999-03-19 | Halbleitereinrichtung mit einer Schmelzschicht |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6259147B1 (enExample) |
| JP (1) | JP4390297B2 (enExample) |
| KR (1) | KR100334598B1 (enExample) |
| DE (1) | DE19912490C2 (enExample) |
| TW (1) | TW411614B (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6562674B1 (en) * | 1999-07-06 | 2003-05-13 | Matsushita Electronics Corporation | Semiconductor integrated circuit device and method of producing the same |
| JP3907911B2 (ja) | 2000-03-30 | 2007-04-18 | Necエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
| DE10026926C2 (de) * | 2000-05-30 | 2002-06-20 | Infineon Technologies Ag | Halbleiteranordnung mit optischer Fuse |
| US6784516B1 (en) * | 2000-10-06 | 2004-08-31 | International Business Machines Corporation | Insulative cap for laser fusing |
| JP4079600B2 (ja) * | 2001-03-06 | 2008-04-23 | 株式会社東芝 | 半導体装置 |
| US6518643B2 (en) * | 2001-03-23 | 2003-02-11 | International Business Machines Corporation | Tri-layer dielectric fuse cap for laser deletion |
| JP2003086687A (ja) * | 2001-09-13 | 2003-03-20 | Seiko Epson Corp | 半導体装置 |
| KR100444722B1 (ko) * | 2002-04-08 | 2004-08-16 | 아남반도체 주식회사 | 퓨즈 라인 제조 방법 |
| KR100709434B1 (ko) * | 2005-06-27 | 2007-04-18 | 주식회사 하이닉스반도체 | 반도체 소자의 퓨즈 박스 |
| JP5060100B2 (ja) * | 2006-10-26 | 2012-10-31 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| CN119724081B (zh) * | 2025-01-15 | 2025-10-03 | 闽都创新实验室 | 一种基于单向截流电流栅调控发光器件驱动方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5589706A (en) * | 1995-05-31 | 1996-12-31 | International Business Machines Corp. | Fuse link structures through the addition of dummy structures |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07263558A (ja) | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体装置 |
| JP3256626B2 (ja) * | 1994-05-15 | 2002-02-12 | 株式会社東芝 | 半導体装置 |
| TW279229B (en) * | 1994-12-29 | 1996-06-21 | Siemens Ag | Double density fuse bank for the laser break-link programming of an integrated-circuit |
| US5636172A (en) * | 1995-12-22 | 1997-06-03 | Micron Technology, Inc. | Reduced pitch laser redundancy fuse bank structure |
| JPH09213804A (ja) | 1996-01-29 | 1997-08-15 | Mitsubishi Electric Corp | ヒューズ層を有する半導体装置 |
| US5851903A (en) * | 1996-08-20 | 1998-12-22 | International Business Machine Corporation | Method of forming closely pitched polysilicon fuses |
| US5949323A (en) * | 1998-06-30 | 1999-09-07 | Clear Logic, Inc. | Non-uniform width configurable fuse structure |
-
1998
- 1998-06-19 JP JP17312098A patent/JP4390297B2/ja not_active Expired - Lifetime
-
1999
- 1999-01-07 US US09/226,161 patent/US6259147B1/en not_active Expired - Lifetime
- 1999-03-12 TW TW088103825A patent/TW411614B/zh not_active IP Right Cessation
- 1999-03-19 DE DE19912490A patent/DE19912490C2/de not_active Expired - Lifetime
- 1999-03-22 KR KR1019990009747A patent/KR100334598B1/ko not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5589706A (en) * | 1995-05-31 | 1996-12-31 | International Business Machines Corp. | Fuse link structures through the addition of dummy structures |
Also Published As
| Publication number | Publication date |
|---|---|
| DE19912490A1 (de) | 2000-01-20 |
| US6259147B1 (en) | 2001-07-10 |
| JP2000012691A (ja) | 2000-01-14 |
| KR100334598B1 (ko) | 2002-05-02 |
| JP4390297B2 (ja) | 2009-12-24 |
| KR20000005616A (ko) | 2000-01-25 |
| TW411614B (en) | 2000-11-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| 8304 | Grant after examination procedure | ||
| 8364 | No opposition during term of opposition | ||
| R082 | Change of representative |
Representative=s name: PRUEFER & PARTNER GBR, DE |
|
| R081 | Change of applicant/patentee |
Owner name: RENESAS ELECTRONICS CORPORATION, KAWASAKI-SHI, JP Free format text: FORMER OWNER: MITSUBISHI DENKI K.K., TOKYO, JP Effective date: 20140915 Owner name: RENESAS ELECTRONICS CORPORATION, JP Free format text: FORMER OWNER: MITSUBISHI DENKI K.K., TOKYO, JP Effective date: 20140915 |
|
| R082 | Change of representative |
Representative=s name: PRUEFER & PARTNER GBR, DE Effective date: 20140915 Representative=s name: PRUEFER & PARTNER MBB PATENTANWAELTE RECHTSANW, DE Effective date: 20140915 |
|
| R081 | Change of applicant/patentee |
Owner name: RENESAS ELECTRONICS CORPORATION, JP Free format text: FORMER OWNER: RENESAS ELECTRONICS CORPORATION, KAWASAKI-SHI, KANAGAWA, JP |
|
| R082 | Change of representative |
Representative=s name: PRUEFER & PARTNER MBB PATENTANWAELTE RECHTSANW, DE |
|
| R071 | Expiry of right |