DE68918032T2 - UV-löschbarer EPROM mit redundanter Schaltung. - Google Patents

UV-löschbarer EPROM mit redundanter Schaltung.

Info

Publication number
DE68918032T2
DE68918032T2 DE68918032T DE68918032T DE68918032T2 DE 68918032 T2 DE68918032 T2 DE 68918032T2 DE 68918032 T DE68918032 T DE 68918032T DE 68918032 T DE68918032 T DE 68918032T DE 68918032 T2 DE68918032 T2 DE 68918032T2
Authority
DE
Germany
Prior art keywords
redundant circuit
erasable eprom
eprom
erasable
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68918032T
Other languages
English (en)
Other versions
DE68918032D1 (de
Inventor
Yasushi C O Nec Corpo Yamagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE68918032D1 publication Critical patent/DE68918032D1/de
Application granted granted Critical
Publication of DE68918032T2 publication Critical patent/DE68918032T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
DE68918032T 1988-09-22 1989-09-22 UV-löschbarer EPROM mit redundanter Schaltung. Expired - Fee Related DE68918032T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63239215A JPH0777239B2 (ja) 1988-09-22 1988-09-22 浮遊ゲート型不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE68918032D1 DE68918032D1 (de) 1994-10-13
DE68918032T2 true DE68918032T2 (de) 1995-05-04

Family

ID=17041457

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68918032T Expired - Fee Related DE68918032T2 (de) 1988-09-22 1989-09-22 UV-löschbarer EPROM mit redundanter Schaltung.

Country Status (4)

Country Link
US (1) US5070378A (de)
EP (1) EP0360288B1 (de)
JP (1) JPH0777239B2 (de)
DE (1) DE68918032T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5523968A (en) * 1988-05-07 1996-06-04 Seiko Epson Corporation IC semiconductor memory devices with maintained stable operation and lower operating current characteristics
KR950011026B1 (ko) * 1990-06-28 1995-09-27 가시오 게이상기 가부시끼가이샤 박막 메모리셀
US5311462A (en) * 1991-12-19 1994-05-10 Intel Corporation Physical placement of content addressable memories
DE69333881T2 (de) * 1992-07-31 2006-07-13 Hughes Electronics Corp., El Segundo Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen
US5783846A (en) * 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
JP2980012B2 (ja) * 1995-10-16 1999-11-22 日本電気株式会社 不揮発性半導体記憶装置
JP3001454B2 (ja) * 1997-04-23 2000-01-24 日本電気アイシーマイコンシステム株式会社 半導体装置
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
US6091652A (en) * 1998-12-11 2000-07-18 Lsi Logic Corporation Testing semiconductor devices for data retention
US6396368B1 (en) 1999-11-10 2002-05-28 Hrl Laboratories, Llc CMOS-compatible MEM switches and method of making
US7217977B2 (en) 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US7294935B2 (en) * 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
US6791191B2 (en) 2001-01-24 2004-09-14 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
US6740942B2 (en) 2001-06-15 2004-05-25 Hrl Laboratories, Llc. Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6774413B2 (en) * 2001-06-15 2004-08-10 Hrl Laboratories, Llc Integrated circuit structure with programmable connector/isolator
TW507369B (en) * 2001-10-29 2002-10-21 Macronix Int Co Ltd Silicon nitride read only memory structure for preventing antenna effect
US6744117B2 (en) * 2002-02-28 2004-06-01 Motorola, Inc. High frequency semiconductor device and method of manufacture
US6897535B2 (en) 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6979606B2 (en) 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
JP4846239B2 (ja) 2002-12-13 2011-12-28 エイチアールエル ラボラトリーズ,エルエルシー ウェル注入を用いた集積回路の改変
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58197777A (ja) * 1982-05-12 1983-11-17 Mitsubishi Electric Corp 半導体不揮発性記憶装置
JPS616868A (ja) * 1984-06-20 1986-01-13 Nec Corp Mis型電界効果半導体装置
JPS6149475A (ja) * 1984-08-17 1986-03-11 Matsushita Electronics Corp 紫外線照射型半導体装置
JPS6236869A (ja) * 1985-08-12 1987-02-17 Toshiba Corp 不揮発性半導体記憶装置
US4805138A (en) * 1985-08-23 1989-02-14 Texas Instruments Incorporated An unerasable eprom cell
JPS62143476A (ja) * 1985-12-18 1987-06-26 Fujitsu Ltd 半導体記憶装置
US4758869A (en) * 1986-08-29 1988-07-19 Waferscale Integration, Inc. Nonvolatile floating gate transistor structure
JPH061840B2 (ja) * 1987-07-08 1994-01-05 日本電気株式会社 光遮へい型uprom

Also Published As

Publication number Publication date
EP0360288A2 (de) 1990-03-28
US5070378A (en) 1991-12-03
JPH0287577A (ja) 1990-03-28
JPH0777239B2 (ja) 1995-08-16
DE68918032D1 (de) 1994-10-13
EP0360288B1 (de) 1994-09-07
EP0360288A3 (en) 1990-10-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee