DE1209212B - Verfahren zum Herstellen eines Halbleiterbauelements - Google Patents

Verfahren zum Herstellen eines Halbleiterbauelements

Info

Publication number
DE1209212B
DE1209212B DES86760A DES0086760A DE1209212B DE 1209212 B DE1209212 B DE 1209212B DE S86760 A DES86760 A DE S86760A DE S0086760 A DES0086760 A DE S0086760A DE 1209212 B DE1209212 B DE 1209212B
Authority
DE
Germany
Prior art keywords
semiconductor
treatment liquid
treatment
semiconductor body
vapors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DES86760A
Other languages
German (de)
English (en)
Inventor
Dr-Ing Reimer Emeis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from AT688062A external-priority patent/AT237751B/de
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of DE1209212B publication Critical patent/DE1209212B/de
Pending legal-status Critical Current

Links

Classifications

    • H10P95/50—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/12—Gaseous compositions
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F4/00—Processes for removing metallic material from surfaces, not provided for in group C23F1/00 or C23F3/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H10P50/00—
    • H10P95/00—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49208—Contact or terminal manufacturing by assembling plural parts
    • Y10T29/4921—Contact or terminal manufacturing by assembling plural parts with bonding
    • Y10T29/49211—Contact or terminal manufacturing by assembling plural parts with bonding of fused material
    • Y10T29/49213—Metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
  • Silicon Compounds (AREA)
DES86760A 1962-06-19 1963-08-16 Verfahren zum Herstellen eines Halbleiterbauelements Pending DE1209212B (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DES0079972 1962-06-19
AT688062A AT237751B (de) 1962-08-28 1962-08-28 Verfahren zur Herstellung eines Halbleiterbauelementes

Publications (1)

Publication Number Publication Date
DE1209212B true DE1209212B (de) 1966-01-20

Family

ID=25603393

Family Applications (1)

Application Number Title Priority Date Filing Date
DES86760A Pending DE1209212B (de) 1962-06-19 1963-08-16 Verfahren zum Herstellen eines Halbleiterbauelements

Country Status (5)

Country Link
US (1) US3268975A (enExample)
BE (1) BE633796A (enExample)
CH (1) CH409574A (enExample)
DE (1) DE1209212B (enExample)
GB (1) GB1019332A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6018192A (en) * 1998-07-30 2000-01-25 Motorola, Inc. Electronic device with a thermal control capability

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1040135B (de) * 1956-10-27 1958-10-02 Siemens Ag Verfahren zur Herstellung von Halbleiteranordnungen aus Silicium od. dgl. durch Anwendung eines chemischen AEtzvorganges an der Stelle des p-n-UEberganges
DE1044287B (de) * 1954-03-10 1958-11-20 Sylvania Electric Prod Legierungsverfahren zur Herstellung von Halbleiter-anordnungen mit p-n-UEbergaengen
DE1149222B (de) * 1961-08-15 1963-05-22 Licentia Gmbh Vorrichtung zum AEtzen von Halbleiterkoerpern

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2364501A (en) * 1941-04-04 1944-12-05 Bliley Electric Company Piezoelectric crystal apparatus
US2462218A (en) * 1945-04-17 1949-02-22 Bell Telephone Labor Inc Electrical translator and method of making it
US2719373A (en) * 1952-05-27 1955-10-04 Univis Lens Co Apparatus for etching surfaces
DE966879C (de) * 1953-02-21 1957-09-12 Standard Elektrik Ag Verfahren zur Reinigung und/oder Abtragung von Halbleitermaterial, insbesondere von Germanium- und Siliziumsubstanz
US3079254A (en) * 1959-01-26 1963-02-26 George W Crowley Photographic fabrication of semiconductor devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1044287B (de) * 1954-03-10 1958-11-20 Sylvania Electric Prod Legierungsverfahren zur Herstellung von Halbleiter-anordnungen mit p-n-UEbergaengen
DE1040135B (de) * 1956-10-27 1958-10-02 Siemens Ag Verfahren zur Herstellung von Halbleiteranordnungen aus Silicium od. dgl. durch Anwendung eines chemischen AEtzvorganges an der Stelle des p-n-UEberganges
DE1149222B (de) * 1961-08-15 1963-05-22 Licentia Gmbh Vorrichtung zum AEtzen von Halbleiterkoerpern

Also Published As

Publication number Publication date
BE633796A (enExample)
US3268975A (en) 1966-08-30
GB1019332A (en) 1966-02-02
CH409574A (de) 1966-03-15

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