DE112022005438T5 - Halbleiterbauteil und Verfahren zur Herstellung des Halbleiterbauteils - Google Patents

Halbleiterbauteil und Verfahren zur Herstellung des Halbleiterbauteils Download PDF

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Publication number
DE112022005438T5
DE112022005438T5 DE112022005438.7T DE112022005438T DE112022005438T5 DE 112022005438 T5 DE112022005438 T5 DE 112022005438T5 DE 112022005438 T DE112022005438 T DE 112022005438T DE 112022005438 T5 DE112022005438 T5 DE 112022005438T5
Authority
DE
Germany
Prior art keywords
resin
terminal
sealing resin
thickness direction
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022005438.7T
Other languages
German (de)
English (en)
Inventor
Hiroaki Aoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112022005438T5 publication Critical patent/DE112022005438T5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/468—Circuit boards
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/048—Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE112022005438.7T 2021-12-13 2022-11-30 Halbleiterbauteil und Verfahren zur Herstellung des Halbleiterbauteils Pending DE112022005438T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021201802 2021-12-13
JP2021-201802 2021-12-13
PCT/JP2022/044165 WO2023112677A1 (ja) 2021-12-13 2022-11-30 半導体装置および半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE112022005438T5 true DE112022005438T5 (de) 2024-08-29

Family

ID=86774201

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022005438.7T Pending DE112022005438T5 (de) 2021-12-13 2022-11-30 Halbleiterbauteil und Verfahren zur Herstellung des Halbleiterbauteils

Country Status (5)

Country Link
US (1) US20240312878A1 (https=)
JP (1) JPWO2023112677A1 (https=)
CN (1) CN118541798A (https=)
DE (1) DE112022005438T5 (https=)
WO (1) WO2023112677A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2025047268A1 (ja) * 2023-08-25 2025-03-06 ローム株式会社 半導体装置
CN118380338A (zh) * 2024-04-26 2024-07-23 强茂电子(无锡)有限公司 一种无引脚半导体封装器件的制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018190875A (ja) 2017-05-10 2018-11-29 ローム株式会社 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10366948B2 (en) * 2016-03-17 2019-07-30 Rohm Co., Ltd. Semiconductor device and method for manufacturing the same
JP2018085487A (ja) * 2016-11-25 2018-05-31 マクセルホールディングス株式会社 半導体装置の製造方法および半導体装置
JP2021027211A (ja) * 2019-08-07 2021-02-22 ローム株式会社 電子装置
JP2021158317A (ja) * 2020-03-30 2021-10-07 ローム株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018190875A (ja) 2017-05-10 2018-11-29 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
WO2023112677A1 (ja) 2023-06-22
JPWO2023112677A1 (https=) 2023-06-22
CN118541798A (zh) 2024-08-23
US20240312878A1 (en) 2024-09-19

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Legal Events

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R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0023495000

Ipc: H10W0070400000