DE112021007977T5 - Siliciumcarbid-halbleitereinrichtung und elektrischer stromrichter - Google Patents

Siliciumcarbid-halbleitereinrichtung und elektrischer stromrichter Download PDF

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Publication number
DE112021007977T5
DE112021007977T5 DE112021007977.8T DE112021007977T DE112021007977T5 DE 112021007977 T5 DE112021007977 T5 DE 112021007977T5 DE 112021007977 T DE112021007977 T DE 112021007977T DE 112021007977 T5 DE112021007977 T5 DE 112021007977T5
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DE
Germany
Prior art keywords
regions
silicon carbide
region
type
super junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112021007977.8T
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German (de)
English (en)
Inventor
Yuichi Nagahisa
Takaaki TOMINAGA
Yutaka Fukui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE112021007977T5 publication Critical patent/DE112021007977T5/de
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/051—Forming charge compensation regions, e.g. superjunctions
    • H10D62/058—Forming charge compensation regions, e.g. superjunctions by using trenches, e.g. implanting into sidewalls of trenches or refilling trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H10D62/111—Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide

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  • Electrodes Of Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Junction Field-Effect Transistors (AREA)
DE112021007977.8T 2021-07-15 2021-07-15 Siliciumcarbid-halbleitereinrichtung und elektrischer stromrichter Pending DE112021007977T5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/026592 WO2023286235A1 (ja) 2021-07-15 2021-07-15 炭化珪素半導体装置および電力変換装置

Publications (1)

Publication Number Publication Date
DE112021007977T5 true DE112021007977T5 (de) 2024-05-02

Family

ID=84919774

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112021007977.8T Pending DE112021007977T5 (de) 2021-07-15 2021-07-15 Siliciumcarbid-halbleitereinrichtung und elektrischer stromrichter

Country Status (5)

Country Link
US (1) US20240290830A1 (https=)
JP (1) JP7625086B2 (https=)
CN (1) CN117693822A (https=)
DE (1) DE112021007977T5 (https=)
WO (1) WO2023286235A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2025158774A (ja) * 2024-04-05 2025-10-17 富士電機株式会社 半導体装置
CN120111920B (zh) * 2025-02-25 2026-04-17 中国科学院微电子研究所 一种抗辐射加固设计的四端子SiC MOSFET器件及其制造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377302U (https=) 1986-11-07 1988-05-23

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3913564B2 (ja) * 2002-01-31 2007-05-09 富士電機ホールディングス株式会社 超接合半導体素子の製造方法
JP4166627B2 (ja) * 2003-05-30 2008-10-15 株式会社デンソー 半導体装置
JP5369372B2 (ja) * 2005-11-28 2013-12-18 富士電機株式会社 半導体装置および半導体装置の製造方法
JP4539680B2 (ja) * 2007-05-14 2010-09-08 株式会社デンソー 半導体装置およびその製造方法
US10243039B2 (en) * 2016-03-22 2019-03-26 General Electric Company Super-junction semiconductor power devices with fast switching capability

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6377302U (https=) 1986-11-07 1988-05-23

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
C. Darmodya und N. Goldsmanb, „Incomplete ionization in aluminum-doped 4H-silicon carbide", J. Appl. Phys. 126, 145701
S. K. Lee. et al., „Low resistivity ohmic titanium carbide contacts to n- and p-type 4H-silicon carbide", Solid-State Electronics 44 (2000), 1179-1186
T. Fujihira, „Theory of Semiconductor Superjunction Devices", Jpn. J. Appl. Phys., Band 36, Seiten 6254-6262

Also Published As

Publication number Publication date
JPWO2023286235A1 (https=) 2023-01-19
JP7625086B2 (ja) 2025-01-31
US20240290830A1 (en) 2024-08-29
CN117693822A (zh) 2024-03-12
WO2023286235A1 (ja) 2023-01-19

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