DE112020004134T5 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung Download PDF

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Publication number
DE112020004134T5
DE112020004134T5 DE112020004134.4T DE112020004134T DE112020004134T5 DE 112020004134 T5 DE112020004134 T5 DE 112020004134T5 DE 112020004134 T DE112020004134 T DE 112020004134T DE 112020004134 T5 DE112020004134 T5 DE 112020004134T5
Authority
DE
Germany
Prior art keywords
insulator
conductor
oxide
over
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112020004134.4T
Other languages
German (de)
English (en)
Inventor
Shunpei Yamazaki
Yoshinori Ando
Ryota Hodo
Takashi Hirose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of DE112020004134T5 publication Critical patent/DE112020004134T5/de
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/435—Cross-sectional shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE112020004134.4T 2019-08-30 2020-08-17 Halbleitervorrichtung Pending DE112020004134T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019158456 2019-08-30
JP2019-158456 2019-08-30
PCT/IB2020/057714 WO2021038361A1 (ja) 2019-08-30 2020-08-17 半導体装置

Publications (1)

Publication Number Publication Date
DE112020004134T5 true DE112020004134T5 (de) 2022-05-19

Family

ID=74683598

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112020004134.4T Pending DE112020004134T5 (de) 2019-08-30 2020-08-17 Halbleitervorrichtung

Country Status (7)

Country Link
US (2) US12538523B2 (https=)
JP (2) JP7629856B2 (https=)
KR (1) KR20220052972A (https=)
CN (1) CN114223060A (https=)
DE (1) DE112020004134T5 (https=)
TW (1) TW202129877A (https=)
WO (1) WO2021038361A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20230111510A (ko) 2022-01-18 2023-07-25 삼성전자주식회사 반도체 장치
WO2023180859A1 (ja) * 2022-03-25 2023-09-28 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の作製方法
US20250015191A1 (en) * 2023-07-06 2025-01-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and manufacturing method thereof
WO2025017441A1 (ja) * 2023-07-20 2025-01-23 株式会社半導体エネルギー研究所 製造装置、及び、半導体装置の作製方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101473684B1 (ko) 2009-12-25 2014-12-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101809105B1 (ko) 2010-08-06 2017-12-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 집적 회로
TWI574259B (zh) 2010-09-29 2017-03-11 半導體能源研究所股份有限公司 半導體記憶體裝置和其驅動方法
KR102108572B1 (ko) 2011-09-26 2020-05-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
KR102069158B1 (ko) 2012-05-10 2020-01-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 배선의 형성 방법, 반도체 장치, 및 반도체 장치의 제작 방법
JP6607681B2 (ja) 2014-03-07 2019-11-20 株式会社半導体エネルギー研究所 半導体装置
KR102788207B1 (ko) * 2015-04-13 2025-03-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2017081579A1 (en) 2015-11-13 2017-05-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US9917207B2 (en) 2015-12-25 2018-03-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US10032918B2 (en) * 2016-04-22 2018-07-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
KR102605250B1 (ko) 2016-08-30 2023-11-27 삼성디스플레이 주식회사 반도체 장치 및 그 제조 방법
CN108075038A (zh) * 2016-11-11 2018-05-25 中芯国际集成电路制造(上海)有限公司 动态随机存储器及其形成方法
TW201836020A (zh) 2017-02-17 2018-10-01 日商半導體能源研究所股份有限公司 半導體裝置及半導體裝置的製造方法
JP2018206828A (ja) * 2017-05-31 2018-12-27 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JPWO2019048987A1 (ja) 2017-09-06 2020-10-15 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP7229669B2 (ja) * 2017-11-17 2023-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

Also Published As

Publication number Publication date
JPWO2021038361A1 (https=) 2021-03-04
US20260101540A1 (en) 2026-04-09
CN114223060A (zh) 2022-03-22
JP2025065235A (ja) 2025-04-17
KR20220052972A (ko) 2022-04-28
US12538523B2 (en) 2026-01-27
TW202129877A (zh) 2021-08-01
WO2021038361A1 (ja) 2021-03-04
US20220278235A1 (en) 2022-09-01
JP7629856B2 (ja) 2025-02-14

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