DE112015001803A5 - Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements - Google Patents
Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements Download PDFInfo
- Publication number
- DE112015001803A5 DE112015001803A5 DE112015001803.4T DE112015001803T DE112015001803A5 DE 112015001803 A5 DE112015001803 A5 DE 112015001803A5 DE 112015001803 T DE112015001803 T DE 112015001803T DE 112015001803 A5 DE112015001803 A5 DE 112015001803A5
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- Prior art keywords
- semiconductor device
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 239000004065 semiconductor Substances 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Led Devices (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102014105303.6A DE102014105303A1 (de) | 2014-04-14 | 2014-04-14 | Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements |
DE102014105303.6 | 2014-04-14 | ||
PCT/EP2015/057972 WO2015158658A1 (de) | 2014-04-14 | 2015-04-13 | Verfahren zur herstellung einer schichtstruktur als pufferschicht eines halbleiterbauelements sowie schichtstruktur als pufferschicht eines halbleiterbauelements |
Publications (2)
Publication Number | Publication Date |
---|---|
DE112015001803A5 true DE112015001803A5 (de) | 2017-01-12 |
DE112015001803B4 DE112015001803B4 (de) | 2023-12-28 |
Family
ID=53039852
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE102014105303.6A Withdrawn DE102014105303A1 (de) | 2014-04-14 | 2014-04-14 | Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements |
DE112015001803.4T Active DE112015001803B4 (de) | 2014-04-14 | 2015-04-13 | Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE102014105303.6A Withdrawn DE102014105303A1 (de) | 2014-04-14 | 2014-04-14 | Verfahren zur Herstellung einer Schichtstruktur als Pufferschicht eines Halbleiterbauelements sowie Schichtstruktur als Pufferschicht eines Halbleiterbauelements |
Country Status (4)
Country | Link |
---|---|
US (1) | US10147601B2 (de) |
JP (1) | JP6463376B2 (de) |
DE (2) | DE102014105303A1 (de) |
WO (1) | WO2015158658A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102018101558A1 (de) | 2018-01-24 | 2019-07-25 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Nitrid-Verbindungshalbleiter-Bauelements |
CN110643934A (zh) * | 2019-09-20 | 2020-01-03 | 深圳市晶相技术有限公司 | 一种半导体设备 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5915194A (en) | 1997-07-03 | 1999-06-22 | The United States Of America As Represented By The Administrator Of National Aeronautics And Space Administration | Method for growth of crystal surfaces and growth of heteroepitaxial single crystal films thereon |
US6592661B1 (en) * | 1998-02-25 | 2003-07-15 | Micron Technology, Inc. | Method for processing wafers in a semiconductor fabrication system |
DE10034263B4 (de) | 2000-07-14 | 2008-02-28 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Quasisubstrats |
JP3982788B2 (ja) | 2000-09-14 | 2007-09-26 | 独立行政法人理化学研究所 | 半導体層の形成方法 |
US6391748B1 (en) * | 2000-10-03 | 2002-05-21 | Texas Tech University | Method of epitaxial growth of high quality nitride layers on silicon substrates |
JP3956637B2 (ja) * | 2001-04-12 | 2007-08-08 | ソニー株式会社 | 窒化物半導体の結晶成長方法及び半導体素子の形成方法 |
JP4371202B2 (ja) | 2003-06-27 | 2009-11-25 | 日立電線株式会社 | 窒化物半導体の製造方法及び半導体ウエハ並びに半導体デバイス |
JP4130389B2 (ja) | 2003-08-18 | 2008-08-06 | 豊田合成株式会社 | Iii族窒化物系化合物半導体基板の製造方法 |
US8435879B2 (en) * | 2005-12-12 | 2013-05-07 | Kyma Technologies, Inc. | Method for making group III nitride articles |
SG10201405004WA (en) | 2006-02-23 | 2014-10-30 | Azzurro Semiconductors Ag | Nitride semiconductor component and process for its production |
DE102006008929A1 (de) | 2006-02-23 | 2007-08-30 | Azzurro Semiconductors Ag | Nitridhalbleiter-Bauelement und Verfahren zu seiner Herstellung |
JP4941172B2 (ja) * | 2007-08-22 | 2012-05-30 | 日立電線株式会社 | Iii−v族窒化物半導体自立基板及びiii−v族窒化物半導体自立基板の製造方法 |
DE102009047881B4 (de) | 2009-09-30 | 2022-03-03 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung einer epitaktisch hergestellten Schichtstruktur |
DE102010035489A1 (de) | 2010-08-26 | 2012-03-01 | Osram Opto Semiconductors Gmbh | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelement |
GB2485418B (en) * | 2010-11-15 | 2014-10-01 | Dandan Zhu | Semiconductor materials |
CN103748662B (zh) * | 2011-06-28 | 2016-11-09 | 圣戈班晶体及检测公司 | 半导体衬底及形成方法 |
FR2977260B1 (fr) | 2011-06-30 | 2013-07-19 | Soitec Silicon On Insulator | Procede de fabrication d'une couche epitaxiale epaisse de nitrure de gallium sur un substrat de silicium ou analogue et couche obtenue par ledit procede |
DE102011114670A1 (de) | 2011-09-30 | 2013-04-04 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Halbleiterchips und optoelektronischer Halbleiterchip |
DE102011114665B4 (de) | 2011-09-30 | 2023-09-21 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung eines optoelektronischen Nitrid-Verbindungshalbleiter-Bauelements |
CN104025260B (zh) | 2012-08-03 | 2016-11-23 | 夏普株式会社 | 氮化物半导体元件结构体及其制造方法 |
DE102012217631B4 (de) | 2012-09-27 | 2022-05-25 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelektronisches Bauelement mit einer Schichtstruktur |
GB201217617D0 (en) * | 2012-10-02 | 2012-11-14 | Kappers Menno | Semiconductor materials |
US9806224B2 (en) | 2013-01-31 | 2017-10-31 | Osram Opto Semiconductors Gmbh | Semiconductor layer sequence and method for producing a semiconductor layer sequence |
-
2014
- 2014-04-14 DE DE102014105303.6A patent/DE102014105303A1/de not_active Withdrawn
-
2015
- 2015-04-13 WO PCT/EP2015/057972 patent/WO2015158658A1/de active Application Filing
- 2015-04-13 DE DE112015001803.4T patent/DE112015001803B4/de active Active
- 2015-04-13 JP JP2016562930A patent/JP6463376B2/ja active Active
- 2015-04-13 US US15/304,488 patent/US10147601B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP6463376B2 (ja) | 2019-01-30 |
DE102014105303A1 (de) | 2015-10-15 |
WO2015158658A1 (de) | 2015-10-22 |
JP2017518630A (ja) | 2017-07-06 |
US10147601B2 (en) | 2018-12-04 |
US20170040165A1 (en) | 2017-02-09 |
DE112015001803B4 (de) | 2023-12-28 |
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Legal Events
Date | Code | Title | Description |
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R012 | Request for examination validly filed | ||
R016 | Response to examination communication | ||
R016 | Response to examination communication | ||
R018 | Grant decision by examination section/examining division |