DE112013005512B4 - Herstellung von Wafern mit hoher Präzipitatdichte durch Aktivierung von inaktiven Sauerstoffpräzipationskeimen durch Hitzebehandlung - Google Patents

Herstellung von Wafern mit hoher Präzipitatdichte durch Aktivierung von inaktiven Sauerstoffpräzipationskeimen durch Hitzebehandlung Download PDF

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Publication number
DE112013005512B4
DE112013005512B4 DE112013005512.0T DE112013005512T DE112013005512B4 DE 112013005512 B4 DE112013005512 B4 DE 112013005512B4 DE 112013005512 T DE112013005512 T DE 112013005512T DE 112013005512 B4 DE112013005512 B4 DE 112013005512B4
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Prior art keywords
wafer
oxygen
oxygen precipitate
precipitate nuclei
temperature
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DE112013005512.0T
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German (de)
English (en)
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DE112013005512T5 (de
Inventor
Robert J. Falster
Vladimir V. Voronkov
Marco Cornara
Daniela Gambaro
Massimiliano Olmo
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GlobalWafers Co Ltd
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GlobalWafers Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE112013005512.0T 2012-11-19 2013-11-19 Herstellung von Wafern mit hoher Präzipitatdichte durch Aktivierung von inaktiven Sauerstoffpräzipationskeimen durch Hitzebehandlung Active DE112013005512B4 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201261728084P 2012-11-19 2012-11-19
US61/728,084 2012-11-19
USUS-61/728,084 2012-11-19
PCT/US2013/070771 WO2014078847A1 (en) 2012-11-19 2013-11-19 Production of high precipitate density wafers by activation of inactive oxygen precipitate nuclei by heat treatment

Publications (2)

Publication Number Publication Date
DE112013005512T5 DE112013005512T5 (de) 2015-07-30
DE112013005512B4 true DE112013005512B4 (de) 2019-03-28

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DE112013005512.0T Active DE112013005512B4 (de) 2012-11-19 2013-11-19 Herstellung von Wafern mit hoher Präzipitatdichte durch Aktivierung von inaktiven Sauerstoffpräzipationskeimen durch Hitzebehandlung

Country Status (5)

Country Link
US (1) US9129919B2 (enExample)
JP (2) JP2016504759A (enExample)
DE (1) DE112013005512B4 (enExample)
TW (1) TWI614808B (enExample)
WO (1) WO2014078847A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016504759A (ja) * 2012-11-19 2016-02-12 サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ 熱処理により不活性な酸素析出核を活性化する高析出密度ウエハの製造
DE102014208815B4 (de) * 2014-05-09 2018-06-21 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe aus Silizium
DE102017213587A1 (de) 2017-08-04 2019-02-07 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium und Verfahren zur Herstellung der Halbleiterscheibe
DE102017219255A1 (de) * 2017-10-26 2019-05-02 Siltronic Ag Halbleiterscheibe aus einkristallinem Silizium
WO2020213230A1 (ja) 2019-04-16 2020-10-22 信越半導体株式会社 シリコン単結晶ウェーハの製造方法及びシリコン単結晶ウェーハ

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5024723A (en) 1990-05-07 1991-06-18 Goesele Ulrich M Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning
US5189500A (en) 1989-09-22 1993-02-23 Mitsubishi Denki Kabushiki Kaisha Multi-layer type semiconductor device with semiconductor element layers stacked in opposite directions and manufacturing method thereof
US5374564A (en) 1991-09-18 1994-12-20 Commissariat A L'energie Atomique Process for the production of thin semiconductor material films
US5436175A (en) 1993-10-04 1995-07-25 Sharp Microelectronics Technology, Inc. Shallow SIMOX processing method using molecular ion implantation
US5994761A (en) 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
US6191010B1 (en) 1998-09-02 2001-02-20 Memc Electronic Materials, Inc. Process for preparing an ideal oxygen precipitating silicon wafer
US6336968B1 (en) 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
US20040005777A1 (en) 2000-09-20 2004-01-08 Qu Wei Freig Silicon wafer and silicon epitaxial wafer and producition methods therefor
US6955718B2 (en) 2003-07-08 2005-10-18 Memc Electronic Materials, Inc. Process for preparing a stabilized ideal oxygen precipitating silicon wafer

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4437922A (en) * 1982-03-26 1984-03-20 International Business Machines Corporation Method for tailoring oxygen precipitate particle density and distribution silicon wafers
US4851358A (en) 1988-02-11 1989-07-25 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing
US5593494A (en) * 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
EP0948037B1 (en) * 1996-07-29 2006-11-02 Sumco Corporation Method for manufacturing a silicon epitaxial wafer
JP3811582B2 (ja) * 1999-03-18 2006-08-23 信越半導体株式会社 シリコン基板の熱処理方法およびその基板を用いたエピタキシャルウェーハの製造方法
WO2002086960A1 (en) 2001-04-20 2002-10-31 Memc Electronic Materials, Inc. Method for the preparation of a silicon wafer having stabilized oxygen precipitates
US7201800B2 (en) * 2001-12-21 2007-04-10 Memc Electronic Materials, Inc. Process for making silicon wafers with stabilized oxygen precipitate nucleation centers
DE10205084B4 (de) * 2002-02-07 2008-10-16 Siltronic Ag Verfahren zur thermischen Behandlung einer Siliciumscheibe sowie dadurch hergestellte Siliciumscheibe
CN1324664C (zh) * 2002-04-10 2007-07-04 Memc电子材料有限公司 用于控制理想氧沉淀硅片中洁净区深度的方法
JP2004006615A (ja) * 2002-04-26 2004-01-08 Sumitomo Mitsubishi Silicon Corp 高抵抗シリコンウエーハ及びその製造方法
JP2006261632A (ja) 2005-02-18 2006-09-28 Sumco Corp シリコンウェーハの熱処理方法
US7485928B2 (en) * 2005-11-09 2009-02-03 Memc Electronic Materials, Inc. Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
JP5072460B2 (ja) * 2006-09-20 2012-11-14 ジルトロニック アクチエンゲゼルシャフト 半導体用シリコンウエハ、およびその製造方法
WO2010119614A1 (ja) * 2009-04-13 2010-10-21 信越半導体株式会社 アニールウエーハおよびアニールウエーハの製造方法ならびにデバイスの製造方法
DE102010034002B4 (de) * 2010-08-11 2013-02-21 Siltronic Ag Siliciumscheibe und Verfahren zu deren Herstellung
JP2016504759A (ja) * 2012-11-19 2016-02-12 サンエディソン・セミコンダクター・リミテッドＳｕｎＥｄｉｓｏｎ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｌｉｍｉｔｅｄ 熱処理により不活性な酸素析出核を活性化する高析出密度ウエハの製造

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5189500A (en) 1989-09-22 1993-02-23 Mitsubishi Denki Kabushiki Kaisha Multi-layer type semiconductor device with semiconductor element layers stacked in opposite directions and manufacturing method thereof
US5024723A (en) 1990-05-07 1991-06-18 Goesele Ulrich M Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning
US5374564A (en) 1991-09-18 1994-12-20 Commissariat A L'energie Atomique Process for the production of thin semiconductor material films
US5436175A (en) 1993-10-04 1995-07-25 Sharp Microelectronics Technology, Inc. Shallow SIMOX processing method using molecular ion implantation
US5994761A (en) 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
US6180220B1 (en) 1997-02-26 2001-01-30 Memc Electronic Materials, Inc. Ideal Oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
US6191010B1 (en) 1998-09-02 2001-02-20 Memc Electronic Materials, Inc. Process for preparing an ideal oxygen precipitating silicon wafer
US6336968B1 (en) 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
US20040005777A1 (en) 2000-09-20 2004-01-08 Qu Wei Freig Silicon wafer and silicon epitaxial wafer and producition methods therefor
US6955718B2 (en) 2003-07-08 2005-10-18 Memc Electronic Materials, Inc. Process for preparing a stabilized ideal oxygen precipitating silicon wafer

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
F. Shimura, Semiconductor Silicon Crystal Technology, Academic Press, 1989
Silicon Chemical Etching, (J. Grabmaier Hrsg.,) Springer-Verlag, New York, 1982

Also Published As

Publication number Publication date
DE112013005512T5 (de) 2015-07-30
JP2019004173A (ja) 2019-01-10
JP2016504759A (ja) 2016-02-12
US9129919B2 (en) 2015-09-08
WO2014078847A1 (en) 2014-05-22
TWI614808B (zh) 2018-02-11
JP6671436B2 (ja) 2020-03-25
US20140141537A1 (en) 2014-05-22
TW201426877A (zh) 2014-07-01

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