DE112012002368A5 - Verfahren zum Herstellen eines optoelektronischen Halbleiterbauelements und derartiges Halbleiterbauelement - Google Patents
Verfahren zum Herstellen eines optoelektronischen Halbleiterbauelements und derartiges Halbleiterbauelement Download PDFInfo
- Publication number
- DE112012002368A5 DE112012002368A5 DE201211002368 DE112012002368T DE112012002368A5 DE 112012002368 A5 DE112012002368 A5 DE 112012002368A5 DE 201211002368 DE201211002368 DE 201211002368 DE 112012002368 T DE112012002368 T DE 112012002368T DE 112012002368 A5 DE112012002368 A5 DE 112012002368A5
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor component
- producing
- optoelectronic
- optoelectronic semiconductor
- component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 230000005693 optoelectronics Effects 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102011103412.2 | 2011-06-06 | ||
DE201110103412 DE102011103412A1 (de) | 2011-06-06 | 2011-06-06 | Verfahren zum Herstellen eines optolektronischen Halbleiterbauelements und derartiges Halbleiterbauelement |
PCT/EP2012/058921 WO2012168040A1 (de) | 2011-06-06 | 2012-05-14 | Verfahren zum herstellen eines optoelektronischen halbleiterbauelements und derartiges halbleiterbauelement |
Publications (1)
Publication Number | Publication Date |
---|---|
DE112012002368A5 true DE112012002368A5 (de) | 2014-02-20 |
Family
ID=46085046
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE201110103412 Withdrawn DE102011103412A1 (de) | 2011-06-06 | 2011-06-06 | Verfahren zum Herstellen eines optolektronischen Halbleiterbauelements und derartiges Halbleiterbauelement |
DE201211002368 Withdrawn DE112012002368A5 (de) | 2011-06-06 | 2012-05-14 | Verfahren zum Herstellen eines optoelektronischen Halbleiterbauelements und derartiges Halbleiterbauelement |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE201110103412 Withdrawn DE102011103412A1 (de) | 2011-06-06 | 2011-06-06 | Verfahren zum Herstellen eines optolektronischen Halbleiterbauelements und derartiges Halbleiterbauelement |
Country Status (4)
Country | Link |
---|---|
US (1) | US9281425B2 (de) |
CN (1) | CN103563110B (de) |
DE (2) | DE102011103412A1 (de) |
WO (1) | WO2012168040A1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8602745B2 (en) | 2004-08-26 | 2013-12-10 | Pentair Water Pool And Spa, Inc. | Anti-entrapment and anti-dead head function |
DE102013114107A1 (de) * | 2013-12-16 | 2015-07-02 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
US10192849B2 (en) * | 2014-02-10 | 2019-01-29 | Infineon Technologies Ag | Semiconductor modules with semiconductor dies bonded to a metal foil |
DE102014102292A1 (de) * | 2014-02-21 | 2015-08-27 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Bauelements |
DE102014103828A1 (de) | 2014-03-20 | 2015-09-24 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zur Herstellung von optoelektronischen Halbleiterbauelementen |
TWI568026B (zh) * | 2014-11-04 | 2017-01-21 | 錼創科技股份有限公司 | 發光裝置 |
DE102015113310B4 (de) * | 2015-08-12 | 2022-08-04 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterchip |
DE102016100320A1 (de) | 2016-01-11 | 2017-07-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement, optoelektronisches Modul und Verfahren zur Herstellung eines optoelektronischen Bauelements |
WO2019114968A1 (en) * | 2017-12-14 | 2019-06-20 | Osram Opto Semiconductors Gmbh | Semiconductor device and method for producing a carrier element suitable for a semiconductor device |
US11824126B2 (en) * | 2019-12-10 | 2023-11-21 | Maxeon Solar Pte. Ltd. | Aligned metallization for solar cells |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7095053B2 (en) * | 2003-05-05 | 2006-08-22 | Lamina Ceramics, Inc. | Light emitting diodes packaged for high temperature operation |
WO2006005062A2 (en) * | 2004-06-30 | 2006-01-12 | Cree, Inc. | Chip-scale methods for packaging light emitting devices and chip-scale packaged light emitting devices |
US7276724B2 (en) * | 2005-01-20 | 2007-10-02 | Nanosolar, Inc. | Series interconnected optoelectronic device module assembly |
TW200921942A (en) * | 2007-11-14 | 2009-05-16 | Advanced Optoelectronic Tech | Packaging structure of light emitting diode device and method of fabricating the same |
US20090189179A1 (en) * | 2008-01-28 | 2009-07-30 | Fong-Yuan Wen | Method for manufacturing light emitting diode package |
US7948076B2 (en) * | 2008-03-25 | 2011-05-24 | Bridge Semiconductor Corporation | Semiconductor chip assembly with post/base heat spreader and vertical signal routing |
US8193632B2 (en) * | 2008-08-06 | 2012-06-05 | Industrial Technology Research Institute | Three-dimensional conducting structure and method of fabricating the same |
JP5363789B2 (ja) * | 2008-11-18 | 2013-12-11 | スタンレー電気株式会社 | 光半導体装置 |
KR101064026B1 (ko) * | 2009-02-17 | 2011-09-08 | 엘지이노텍 주식회사 | 발광 디바이스 패키지 및 그 제조방법 |
CN101587933B (zh) | 2009-07-07 | 2010-12-08 | 苏州晶方半导体科技股份有限公司 | 发光二极管的晶圆级封装结构及其制造方法 |
DE102009032486A1 (de) * | 2009-07-09 | 2011-01-13 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement |
US8441020B2 (en) * | 2010-03-10 | 2013-05-14 | Micron Technology, Inc. | Light emitting diode wafer-level package with self-aligning features |
CN201804913U (zh) * | 2010-09-30 | 2011-04-20 | 江阴长电先进封装有限公司 | 圆片级led封装结构 |
-
2011
- 2011-06-06 DE DE201110103412 patent/DE102011103412A1/de not_active Withdrawn
-
2012
- 2012-05-14 CN CN201280027636.4A patent/CN103563110B/zh not_active Expired - Fee Related
- 2012-05-14 DE DE201211002368 patent/DE112012002368A5/de not_active Withdrawn
- 2012-05-14 WO PCT/EP2012/058921 patent/WO2012168040A1/de active Application Filing
- 2012-05-14 US US14/122,513 patent/US9281425B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
WO2012168040A1 (de) | 2012-12-13 |
DE102011103412A1 (de) | 2012-12-06 |
US20140151724A1 (en) | 2014-06-05 |
CN103563110A (zh) | 2014-02-05 |
CN103563110B (zh) | 2016-10-26 |
US9281425B2 (en) | 2016-03-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
R012 | Request for examination validly filed | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee | ||
R002 | Refusal decision in examination/registration proceedings |