DE1105524B - Verfahren zur Herstellung einer Halbleiteranordnung, insbesondere eines Transistors,mit einer auflegierten Elektrode - Google Patents

Verfahren zur Herstellung einer Halbleiteranordnung, insbesondere eines Transistors,mit einer auflegierten Elektrode

Info

Publication number
DE1105524B
DE1105524B DEN17048A DEN0017048A DE1105524B DE 1105524 B DE1105524 B DE 1105524B DE N17048 A DEN17048 A DE N17048A DE N0017048 A DEN0017048 A DE N0017048A DE 1105524 B DE1105524 B DE 1105524B
Authority
DE
Germany
Prior art keywords
diffusion
diffused
zone
electrode
electrode material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEN17048A
Other languages
German (de)
English (en)
Inventor
Leonard Johan Tummers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE1105524B publication Critical patent/DE1105524B/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/228Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
DEN17048A 1958-08-07 1959-08-04 Verfahren zur Herstellung einer Halbleiteranordnung, insbesondere eines Transistors,mit einer auflegierten Elektrode Pending DE1105524B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL230316 1958-08-07

Publications (1)

Publication Number Publication Date
DE1105524B true DE1105524B (de) 1961-04-27

Family

ID=19751303

Family Applications (1)

Application Number Title Priority Date Filing Date
DEN17048A Pending DE1105524B (de) 1958-08-07 1959-08-04 Verfahren zur Herstellung einer Halbleiteranordnung, insbesondere eines Transistors,mit einer auflegierten Elektrode

Country Status (6)

Country Link
US (1) US3074826A (US07534539-20090519-C00280.png)
CH (1) CH376186A (US07534539-20090519-C00280.png)
DE (1) DE1105524B (US07534539-20090519-C00280.png)
FR (1) FR1232095A (US07534539-20090519-C00280.png)
GB (1) GB917773A (US07534539-20090519-C00280.png)
NL (2) NL230316A (US07534539-20090519-C00280.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1221362B (de) * 1962-01-12 1966-07-21 Philips Nv Verfahren zum Herstellen einer Halbleiteranordnung

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3172785A (en) * 1960-01-30 1965-03-09 Method of manufacturing transistors particularly for switching purposes
US3220895A (en) * 1961-08-25 1965-11-30 Raytheon Co Fabrication of barrier material devices
US3211594A (en) * 1961-12-19 1965-10-12 Hughes Aircraft Co Semiconductor device manufacture
US3258371A (en) * 1962-02-01 1966-06-28 Semiconductor Res Found Silicon semiconductor device for high frequency, and method of its manufacture
US3307088A (en) * 1962-03-13 1967-02-28 Fujikawa Kyoichi Silver-lead alloy contacts containing dopants for semiconductors
US3257589A (en) * 1962-05-22 1966-06-21 Texas Instruments Inc Transistors and the fabrication thereof
US3268375A (en) * 1962-05-22 1966-08-23 Gordon J Ratcliff Alloy-diffusion process for fabricating germanium transistors
NL297002A (US07534539-20090519-C00280.png) * 1962-08-23 1900-01-01
NL297821A (US07534539-20090519-C00280.png) * 1962-10-08
US3249831A (en) * 1963-01-04 1966-05-03 Westinghouse Electric Corp Semiconductor controlled rectifiers with a p-n junction having a shallow impurity concentration gradient
US3235419A (en) * 1963-01-15 1966-02-15 Philips Corp Method of manufacturing semiconductor devices
US3275910A (en) * 1963-01-18 1966-09-27 Motorola Inc Planar transistor with a relative higher-resistivity base region
US3513041A (en) * 1967-06-19 1970-05-19 Motorola Inc Fabrication of a germanium diffused base power transistor
US3538401A (en) * 1968-04-11 1970-11-03 Westinghouse Electric Corp Drift field thyristor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1163048A (fr) * 1955-09-02 1958-09-22 Gen Electric Co Ltd Diffusion différentielle d'impuretés dans les semi-conducteurs

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2793145A (en) * 1952-06-13 1957-05-21 Sylvania Electric Prod Method of forming a junction transistor
US2836522A (en) * 1952-11-15 1958-05-27 Rca Corp Junction type semiconductor device and method of its manufacture
BE531626A (US07534539-20090519-C00280.png) * 1953-09-04
US2907969A (en) * 1954-02-19 1959-10-06 Westinghouse Electric Corp Photoelectric device
BE542380A (US07534539-20090519-C00280.png) * 1954-10-29

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1163048A (fr) * 1955-09-02 1958-09-22 Gen Electric Co Ltd Diffusion différentielle d'impuretés dans les semi-conducteurs

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1221362B (de) * 1962-01-12 1966-07-21 Philips Nv Verfahren zum Herstellen einer Halbleiteranordnung

Also Published As

Publication number Publication date
FR1232095A (fr) 1960-10-05
NL111773C (US07534539-20090519-C00280.png)
GB917773A (en) 1963-02-06
NL230316A (US07534539-20090519-C00280.png)
US3074826A (en) 1963-01-22
CH376186A (de) 1964-03-31

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