DE10297694T5 - Feldeffekttransistor mit einer lateralen Verarmungs-Struktur - Google Patents

Feldeffekttransistor mit einer lateralen Verarmungs-Struktur Download PDF

Info

Publication number
DE10297694T5
DE10297694T5 DE10297694T DE10297694T DE10297694T5 DE 10297694 T5 DE10297694 T5 DE 10297694T5 DE 10297694 T DE10297694 T DE 10297694T DE 10297694 T DE10297694 T DE 10297694T DE 10297694 T5 DE10297694 T5 DE 10297694T5
Authority
DE
Germany
Prior art keywords
conductivity type
semiconductor substrate
trench
transistor device
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10297694T
Other languages
German (de)
English (en)
Inventor
Bruce D. Murray Marchant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Publication of DE10297694T5 publication Critical patent/DE10297694T5/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
DE10297694T 2002-03-29 2002-03-29 Feldeffekttransistor mit einer lateralen Verarmungs-Struktur Ceased DE10297694T5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2002/010008 WO2003085722A2 (fr) 2002-03-29 2002-03-29 Transistor a effet de champ presentant une structure de depletion laterale

Publications (1)

Publication Number Publication Date
DE10297694T5 true DE10297694T5 (de) 2005-05-12

Family

ID=28789609

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10297694T Ceased DE10297694T5 (de) 2002-03-29 2002-03-29 Feldeffekttransistor mit einer lateralen Verarmungs-Struktur

Country Status (4)

Country Link
JP (1) JP2005522052A (fr)
CN (1) CN100472735C (fr)
DE (1) DE10297694T5 (fr)
WO (1) WO2003085722A2 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008538659A (ja) * 2005-04-22 2008-10-30 アイスモス テクノロジー コーポレイション 酸化物で内面が覆われた溝を有する超接合素子と酸化物で内面を覆われた溝を有する超接合素子を製造するための方法
JP2007012977A (ja) 2005-07-01 2007-01-18 Toshiba Corp 半導体装置
JP5135759B2 (ja) * 2006-10-19 2013-02-06 富士電機株式会社 超接合半導体装置の製造方法
CN103762243B (zh) 2007-09-21 2017-07-28 飞兆半导体公司 功率器件
CN101656213B (zh) * 2008-08-19 2012-09-26 尼克森微电子股份有限公司 沟槽栅金属氧化物半导体场效应晶体管及其制作方法
US20120273916A1 (en) 2011-04-27 2012-11-01 Yedinak Joseph A Superjunction Structures for Power Devices and Methods of Manufacture
US8836028B2 (en) 2011-04-27 2014-09-16 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8673700B2 (en) 2011-04-27 2014-03-18 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8772868B2 (en) 2011-04-27 2014-07-08 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8786010B2 (en) 2011-04-27 2014-07-22 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
CN103367438B (zh) * 2012-04-01 2017-09-12 朱江 一种金属半导体电荷补偿的半导体装置及其制备方法
JP2012160753A (ja) * 2012-04-13 2012-08-23 Denso Corp 半導体装置の製造方法
CN103390650B (zh) * 2012-05-04 2017-08-08 朱江 一种具有无源金属肖特基半导体装置及其制备方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5283201A (en) * 1988-05-17 1994-02-01 Advanced Power Technology, Inc. High density power device fabrication process
US6281547B1 (en) * 1997-05-08 2001-08-28 Megamos Corporation Power transistor cells provided with reliable trenched source contacts connected to narrower source manufactured without a source mask
US6239463B1 (en) * 1997-08-28 2001-05-29 Siliconix Incorporated Low resistance power MOSFET or other device containing silicon-germanium layer
DE19848828C2 (de) * 1998-10-22 2001-09-13 Infineon Technologies Ag Halbleiterbauelement mit kleiner Durchlaßspannung und hoher Sperrfähigkeit
US6316806B1 (en) * 1999-03-31 2001-11-13 Fairfield Semiconductor Corporation Trench transistor with a self-aligned source
US6274905B1 (en) * 1999-06-30 2001-08-14 Fairchild Semiconductor Corporation Trench structure substantially filled with high-conductivity material

Also Published As

Publication number Publication date
WO2003085722A3 (fr) 2003-11-27
JP2005522052A (ja) 2005-07-21
CN1628377A (zh) 2005-06-15
CN100472735C (zh) 2009-03-25
WO2003085722A2 (fr) 2003-10-16

Similar Documents

Publication Publication Date Title
DE102012204420B4 (de) Halbleitervorrichtung
DE102008000660B4 (de) Siliziumkarbid-Halbleitervorrichtung
DE10041344B4 (de) SJ-Halbleitervorrichtung
DE10220810B4 (de) Halbleiterbauteil
DE102013224134B4 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE112014000679B4 (de) Isolierschichtsiliciumcarbidhalbleiterbauteil und Verfahren zu dessen Herstellung
DE102008023349B4 (de) Halbleitervorrichtung
EP1408554B1 (fr) Composant semi-conducteur commandé par effet de champ
DE10153739B4 (de) Halbleiterbauelement
DE10120030B4 (de) Lateralhalbleiterbauelement
DE69735349T2 (de) Graben-dmos-transistor mit leichtdotierter wanne
DE112009005299B4 (de) Halbleitervorrichtung
DE10297349T5 (de) Halbleiterstruktur mit verbesserten geringeren Durchlassspannungsverlusten und höherer Sperrfähigkeit
DE102015220171B4 (de) Rückwärtsleitende Halbleitervorrichtung
DE10392617T5 (de) Niedrigsspannungs-Leistungsbauteil mit hoher Dichte und einem Grabengate mit gleichmäßig dotiertem Kanal und dessen Randabschlußtechnik
DE112012003282T5 (de) Siliciumcarbidhalbleitervorrichtung und Verfahren zum Herstellen derselben
DE102012211221A1 (de) Siliciumcarbid-Halbleitervorrichtung
DE19535140A1 (de) Lateraler MOSFET mit hoher Stehspannung und einem Graben sowie Verfahren zu dessen Herstellung
DE60222094T2 (de) Halbleiterbauelemente und ihr peripherieabschluss
DE10296911T5 (de) Leistungs-MOSFET mit verbesserter Durchbruchspannung
DE10229146A1 (de) Laterales Superjunction-Halbleiterbauteil
DE102007060837A1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE102012217031A1 (de) Halbleiterbauelement und herstellungsverfahren dafür
DE102014114312A1 (de) Halbleitervorrichtung und Verfahren zu deren Herstellung
DE10297694T5 (de) Feldeffekttransistor mit einer lateralen Verarmungs-Struktur

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law

Ref document number: 10297694

Country of ref document: DE

Date of ref document: 20050512

Kind code of ref document: P

8125 Change of the main classification

Ipc: H01L 29/78 AFI20051017BHDE

R011 All appeals rejected, refused or otherwise settled
R003 Refusal decision now final

Effective date: 20131004